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authorEli Britstein <elibr@mellanox.com>2020-06-18 15:38:31 +0000
committerSaeed Mahameed <saeedm@mellanox.com>2020-07-16 16:37:00 -0700
commit54b154ecfb8c66dfeba6578a64e79c2104da4ced (patch)
tree73dea58ab9dd356e8d41e953973bb4b28fc46f0a /drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.h
parentnet/mlx5e: Do not request completion on every single UMR WQE (diff)
downloadwireguard-linux-54b154ecfb8c66dfeba6578a64e79c2104da4ced.tar.xz
wireguard-linux-54b154ecfb8c66dfeba6578a64e79c2104da4ced.zip
net/mlx5e: CT: Map 128 bits labels to 32 bit map ID
The 128 bits ct_label field is matched using a 32 bit hardware register. As such, only the lower 32 bits of ct_label field are offloaded. Change this logic to support setting and matching higher bits too. Map the 128 bits data to a unique 32 bits ID. Matching is done as exact match of the mapping ID of key & mask. Signed-off-by: Eli Britstein <elibr@mellanox.com> Reviewed-by: Oz Shlomo <ozsh@mellanox.com> Reviewed-by: Roi Dayan <roid@mellanox.com> Reviewed-by: Maor Dickman <maord@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.h')
-rw-r--r--drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.h3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.h b/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.h
index 5e10a72f5f24..3baef917a677 100644
--- a/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.h
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en/tc_ct.h
@@ -25,6 +25,7 @@ struct mlx5_ct_attr {
u16 ct_action;
struct mlx5_ct_flow *ct_flow;
struct nf_flowtable *nf_ft;
+ u32 ct_labels_id;
};
#define zone_to_reg_ct {\
@@ -90,6 +91,7 @@ int
mlx5_tc_ct_parse_match(struct mlx5e_priv *priv,
struct mlx5_flow_spec *spec,
struct flow_cls_offload *f,
+ struct mlx5_ct_attr *ct_attr,
struct netlink_ext_ack *extack);
int
mlx5_tc_ct_add_no_trk_match(struct mlx5e_priv *priv,
@@ -132,6 +134,7 @@ static inline int
mlx5_tc_ct_parse_match(struct mlx5e_priv *priv,
struct mlx5_flow_spec *spec,
struct flow_cls_offload *f,
+ struct mlx5_ct_attr *ct_attr,
struct netlink_ext_ack *extack)
{
struct flow_rule *rule = flow_cls_offload_flow_rule(f);