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author | Yevgeny Kliteynik <kliteyn@nvidia.com> | 2022-05-26 01:44:18 +0300 |
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committer | Saeed Mahameed <saeedm@nvidia.com> | 2022-10-27 15:50:39 +0100 |
commit | fd785e5213f012ec086fd93319b9e154caae6ddc (patch) | |
tree | c8c5912cfedcf68b9b5a38ce269b1e3eb9ee4076 /drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h | |
parent | net/mlx5: DR, Manage STE send info objects in pool (diff) | |
download | wireguard-linux-fd785e5213f012ec086fd93319b9e154caae6ddc.tar.xz wireguard-linux-fd785e5213f012ec086fd93319b9e154caae6ddc.zip |
net/mlx5: DR, Allocate icm_chunks from their own slab allocator
SW steering allocates/frees lots of icm_chunk structs. To make this more
efficiently, create a separate kmem_cache and allocate these chunks from
this allocator.
By doing this we observe that the alloc/free "hiccups" frequency has
become much lower, which allows for a more steady rule insersion rate.
Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Reviewed-by: Alex Vesker <valex@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to '')
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h index 244685453a27..4f38f0f5b352 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h @@ -915,6 +915,7 @@ struct mlx5dr_domain { struct mlx5dr_icm_pool *action_icm_pool; struct mlx5dr_send_info_pool *send_info_pool_rx; struct mlx5dr_send_info_pool *send_info_pool_tx; + struct kmem_cache *chunks_kmem_cache; struct mlx5dr_send_ring *send_ring; struct mlx5dr_domain_info info; struct xarray csum_fts_xa; |