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author | Yevgeny Kliteynik <kliteyn@nvidia.com> | 2022-03-29 15:21:02 +0300 |
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committer | Saeed Mahameed <saeedm@nvidia.com> | 2022-10-27 15:50:39 +0100 |
commit | 17b56073a0668a153f0e1051dc1bf60960f74810 (patch) | |
tree | cae440b60f982eed115bc6ec036147955337bf48 /drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h | |
parent | net/mlx5: DR, In rehash write the line in the entry immediately (diff) | |
download | wireguard-linux-17b56073a0668a153f0e1051dc1bf60960f74810.tar.xz wireguard-linux-17b56073a0668a153f0e1051dc1bf60960f74810.zip |
net/mlx5: DR, Manage STE send info objects in pool
Instead of allocating/freeing send info objects dynamically, manage them
in pool. The number of send info objects doesn't depend on rules, so after
pre-populating the pool with an initial batch of send info objects, the
pool is not expected to grow.
This way we save alloc/free during writing STEs to ICM, which can
sometimes take up to 40msec.
Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Reviewed-by: Alex Vesker <valex@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Diffstat (limited to '')
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h index 1777a1e508e7..244685453a27 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h @@ -146,6 +146,7 @@ struct mlx5dr_cmd_caps; struct mlx5dr_rule_rx_tx; struct mlx5dr_matcher_rx_tx; struct mlx5dr_ste_ctx; +struct mlx5dr_send_info_pool; struct mlx5dr_ste { /* refcount: indicates the num of rules that using this ste */ @@ -912,6 +913,8 @@ struct mlx5dr_domain { refcount_t refcount; struct mlx5dr_icm_pool *ste_icm_pool; struct mlx5dr_icm_pool *action_icm_pool; + struct mlx5dr_send_info_pool *send_info_pool_rx; + struct mlx5dr_send_info_pool *send_info_pool_tx; struct mlx5dr_send_ring *send_ring; struct mlx5dr_domain_info info; struct xarray csum_fts_xa; @@ -1404,6 +1407,12 @@ int mlx5dr_send_postsend_formatted_htbl(struct mlx5dr_domain *dmn, int mlx5dr_send_postsend_action(struct mlx5dr_domain *dmn, struct mlx5dr_action *action); +int mlx5dr_send_info_pool_create(struct mlx5dr_domain *dmn); +void mlx5dr_send_info_pool_destroy(struct mlx5dr_domain *dmn); +struct mlx5dr_ste_send_info *mlx5dr_send_info_alloc(struct mlx5dr_domain *dmn, + enum mlx5dr_domain_nic_type nic_type); +void mlx5dr_send_info_free(struct mlx5dr_ste_send_info *ste_send_info); + struct mlx5dr_cmd_ft_info { u32 id; u16 vport; |