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| author |   Daniel Machon <daniel.machon@microchip.com> | 2024-10-24 00:01:20 +0200 |
|---|---|---|
| committer |   Jakub Kicinski <kuba@kernel.org> | 2024-10-30 18:08:04 -0700 |
| commit | 1ebaa5e189151a396de3fcd280078eaf7b922920 (patch) | |
| tree | 5f093b0c66d1f6e8682bad417cab7cea4a43d7c5 /drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c | |
| parent | gve: change to use page_pool_put_full_page when recycling pages (diff) | |
| download | wireguard-linux-1ebaa5e189151a396de3fcd280078eaf7b922920.tar.xz wireguard-linux-1ebaa5e189151a396de3fcd280078eaf7b922920.zip | |
net: sparx5: add support for lan969x targets and core clock
In preparation for lan969x, add lan969x targets to
sparx5_target_chiptype and set the core clock frequency for these
throughout. Lan969x only supports a core clock frequency of 328MHz.
Also, set the policer update internal (pol_upd_int) matching the 328 MHz
frequency of the lan969x targets.
Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com>
Signed-off-by: Daniel Machon <daniel.machon@microchip.com>
Link: https://patch.msgid.link/20241024-sparx5-lan969x-switch-driver-2-v2-1-a0b5fae88a0f@microchip.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to '')
| -rw-r--r-- | drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c b/drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c index 9b15e44f9e64..a511f14312f1 100644 --- a/drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_ptp.c @@ -38,6 +38,9 @@ static u64 sparx5_ptp_get_1ppm(struct sparx5 *sparx5) case SPX5_CORE_CLOCK_250MHZ: res = 2301339409586; break; + case SPX5_CORE_CLOCK_328MHZ: + res = 1756832768924; + break; case SPX5_CORE_CLOCK_500MHZ: res = 1150669704793; break; @@ -60,6 +63,9 @@ static u64 sparx5_ptp_get_nominal_value(struct sparx5 *sparx5) case SPX5_CORE_CLOCK_250MHZ: res = 0x1FF0000000000000; break; + case SPX5_CORE_CLOCK_328MHZ: + res = 0x18604697DD0F9B5B; + break; case SPX5_CORE_CLOCK_500MHZ: res = 0x0FF8000000000000; break; |