diff options
| author |   Ivan Khoronzhuk <ivan.khoronzhuk@linaro.org> | 2020-05-13 09:26:14 -0400 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2020-05-14 17:33:29 -0700 |
| commit | ec008fa2a9e5686081053750893de5f407a8d076 (patch) | |
| tree | a98be8885c8c33b373a9fea9bc4eed5c922f6ac4 /drivers/net/ethernet/ti/am65-cpts.h | |
| parent | Merge branch 'net-qed-qede-critical-hw-error-handling' (diff) | |
| download | wireguard-linux-ec008fa2a9e5686081053750893de5f407a8d076.tar.xz wireguard-linux-ec008fa2a9e5686081053750893de5f407a8d076.zip | |
ethernet: ti: am65-cpts: add routines to support taprio offload
TAPRIO/EST offload support in CPSW2G requires EST scheduler
function enabled in CPTS. So this patch add a function to
set cycle time for EST scheduler. It also add a function for
getting time in ns of PHC clock for taprio qdisc configuration.
Mostly to verify if timer update is needed or to get actual
state of oper/admin schedule.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@linaro.org>
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to '')
| -rw-r--r-- | drivers/net/ethernet/ti/am65-cpts.h | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/drivers/net/ethernet/ti/am65-cpts.h b/drivers/net/ethernet/ti/am65-cpts.h index 0b55dc12ba48..98c1960b20b9 100644 --- a/drivers/net/ethernet/ti/am65-cpts.h +++ b/drivers/net/ethernet/ti/am65-cpts.h @@ -12,6 +12,11 @@ struct am65_cpts; +struct am65_cpts_estf_cfg { + u64 ns_period; + u64 ns_start; +}; + #if IS_ENABLED(CONFIG_TI_K3_AM65_CPTS) struct am65_cpts *am65_cpts_create(struct device *dev, void __iomem *regs, struct device_node *node); @@ -19,6 +24,10 @@ int am65_cpts_phc_index(struct am65_cpts *cpts); void am65_cpts_tx_timestamp(struct am65_cpts *cpts, struct sk_buff *skb); void am65_cpts_prep_tx_timestamp(struct am65_cpts *cpts, struct sk_buff *skb); void am65_cpts_rx_enable(struct am65_cpts *cpts, bool en); +u64 am65_cpts_ns_gettime(struct am65_cpts *cpts); +int am65_cpts_estf_enable(struct am65_cpts *cpts, int idx, + struct am65_cpts_estf_cfg *cfg); +void am65_cpts_estf_disable(struct am65_cpts *cpts, int idx); #else static inline struct am65_cpts *am65_cpts_create(struct device *dev, void __iomem *regs, @@ -45,6 +54,21 @@ static inline void am65_cpts_prep_tx_timestamp(struct am65_cpts *cpts, static inline void am65_cpts_rx_enable(struct am65_cpts *cpts, bool en) { } + +static s64 am65_cpts_ns_gettime(struct am65_cpts *cpts) +{ + return 0; +} + +static int am65_cpts_estf_enable(struct am65_cpts *cpts, + int idx, struct am65_cpts_estf_cfg *cfg) +{ + return 0; +} + +static void am65_cpts_estf_disable(struct am65_cpts *cpts, int idx) +{ +} #endif #endif /* K3_CPTS_H_ */ |