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author | Bjarni Jonasson <bjarni.jonasson@microchip.com> | 2021-02-16 16:29:44 +0100 |
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committer | David S. Miller <davem@davemloft.net> | 2021-02-16 14:06:19 -0800 |
commit | ca0d7fd0a58dfc9503775dae7daee341c115e0c7 (patch) | |
tree | e890d5d3d4fd5f38d2aca90d94374c1caeeac98d /drivers/net/phy/mscc/mscc.h | |
parent | net: phy: mscc: improved serdes calibration applied to VSC8514 (diff) | |
download | wireguard-linux-ca0d7fd0a58dfc9503775dae7daee341c115e0c7.tar.xz wireguard-linux-ca0d7fd0a58dfc9503775dae7daee341c115e0c7.zip |
net: phy: mscc: coma mode disabled for VSC8514
The 'coma mode' (configurable through sw or hw) provides an
optional feature that may be used to control when the PHYs become active.
The typical usage is to synchronize the link-up time across
all PHY instances. This patch releases coma mode if not done by hardware,
otherwise the phys will not link-up.
Fixes: e4f9ba642f0b ("net: phy: mscc: add support for VSC8514 PHY.")
Signed-off-by: Steen Hegelund <steen.hegelund@microchip.com>
Signed-off-by: Bjarni Jonasson <bjarni.jonasson@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/mscc/mscc.h')
-rw-r--r-- | drivers/net/phy/mscc/mscc.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/phy/mscc/mscc.h b/drivers/net/phy/mscc/mscc.h index 2028c319f14d..a50235fdf7d9 100644 --- a/drivers/net/phy/mscc/mscc.h +++ b/drivers/net/phy/mscc/mscc.h @@ -140,6 +140,10 @@ enum rgmii_clock_delay { #define MSCC_PHY_PAGE_1588 0x1588 /* PTP (1588) */ #define MSCC_PHY_PAGE_TEST 0x2a30 /* Test reg */ #define MSCC_PHY_PAGE_TR 0x52b5 /* Token ring registers */ +#define MSCC_PHY_GPIO_CONTROL_2 14 + +#define MSCC_PHY_COMA_MODE 0x2000 /* input(1) / output(0) */ +#define MSCC_PHY_COMA_OUTPUT 0x1000 /* value to output */ /* Extended Page 1 Registers */ #define MSCC_PHY_CU_MEDIA_CRC_VALID_CNT 18 |