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authorAntoine Tenart <antoine.tenart@bootlin.com>2020-05-22 17:55:45 +0200
committerDavid S. Miller <davem@davemloft.net>2020-05-23 16:31:53 -0700
commit0ddfee1feece1c85592d49b759286032ef2dd803 (patch)
tree6792d99bf9b7a103202a4eaec791809eef4bd794 /drivers/net/phy/mscc/mscc_main.c
parentnet: stmmac: don't attach interface until resume finishes (diff)
downloadwireguard-linux-0ddfee1feece1c85592d49b759286032ef2dd803.tar.xz
wireguard-linux-0ddfee1feece1c85592d49b759286032ef2dd803.zip
net: phy: mscc: fix initialization of the MACsec protocol mode
At the very end of the MACsec block initialization in the MSCC PHY driver, the MACsec "protocol mode" is set. This setting should be set based on the PHY id within the package, as the bank used to access the register used depends on this. This was not done correctly, and only the first bank was used leading to the two upper PHYs being unstable when using the VSC8584. This patch fixes it. Fixes: 1bbe0ecc2a1a ("net: phy: mscc: macsec initialization") Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/mscc/mscc_main.c')
-rw-r--r--drivers/net/phy/mscc/mscc_main.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/phy/mscc/mscc_main.c b/drivers/net/phy/mscc/mscc_main.c
index acddef79f4e8..c8aa6d905d8e 100644
--- a/drivers/net/phy/mscc/mscc_main.c
+++ b/drivers/net/phy/mscc/mscc_main.c
@@ -1347,6 +1347,8 @@ static int vsc8584_config_init(struct phy_device *phydev)
else
vsc8531->base_addr = phydev->mdio.addr - addr;
+ vsc8531->addr = addr;
+
/* Some parts of the init sequence are identical for every PHY in the
* package. Some parts are modifying the GPIO register bank which is a
* set of registers that are affecting all PHYs, a few resetting the
@@ -1771,6 +1773,8 @@ static int vsc8514_config_init(struct phy_device *phydev)
else
vsc8531->base_addr = phydev->mdio.addr - addr;
+ vsc8531->addr = addr;
+
/* Some parts of the init sequence are identical for every PHY in the
* package. Some parts are modifying the GPIO register bank which is a
* set of registers that are affecting all PHYs, a few resetting the