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author | 2020-12-16 00:17:42 +0100 | |
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committer | 2021-01-06 15:15:40 +0100 | |
commit | aaf120c37cffc59b06a3da489bd0d678b365cd5a (patch) | |
tree | 2b7b35a7b4efb476fd1718432dfbfe4ec8eccc31 /drivers/net/phy/phy.c | |
parent | can: tcan4x5x: fix max register value (diff) | |
download | wireguard-linux-aaf120c37cffc59b06a3da489bd0d678b365cd5a.tar.xz wireguard-linux-aaf120c37cffc59b06a3da489bd0d678b365cd5a.zip |
can: tcan4x5x: tcan4x5x_regmap: set reg_stride to 4
This patch sets the regmap stide to 4, as the chip only supports access on 32
bit alligned access.
Reviewed-by: Dan Murphy <dmurphy@ti.com>
Tested-by: Sean Nyekjaer <sean@geanix.com>
Link: https://lore.kernel.org/r/20201215231746.1132907-13-mkl@pengutronix.de
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Diffstat (limited to 'drivers/net/phy/phy.c')
0 files changed, 0 insertions, 0 deletions