diff options
| author |   Ryder Lee <ryder.lee@mediatek.com> | 2021-10-21 04:57:55 +0800 |
|---|---|---|
| committer |   Felix Fietkau <nbd@nbd.name> | 2021-10-23 13:23:44 +0200 |
| commit | 70fd1333cd32f530bc825f36ce2d705ac43106c2 (patch) | |
| tree | c98d28e0bfe393808f355b7515e2b950f9b4b877 /drivers/net/wireless/mediatek/mt76/mt7915/mcu.h | |
| parent | mt76: mt7915: remove mt7915_mcu_add_he() (diff) | |
| download | wireguard-linux-70fd1333cd32f530bc825f36ce2d705ac43106c2.tar.xz wireguard-linux-70fd1333cd32f530bc825f36ce2d705ac43106c2.zip | |
mt76: mt7915: rework .set_bitrate_mask() to support more options
With this patch, driver can support single rate, (HE)GI and HE_LTF
configuration through .set_bitrate_mask().
Tested-by: MeiChia Chiu <meichia.chiu@mediatek.com>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Diffstat (limited to 'drivers/net/wireless/mediatek/mt76/mt7915/mcu.h')
| -rw-r--r-- | drivers/net/wireless/mediatek/mt76/mt7915/mcu.h | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h index d66918d914da..4821adb793d1 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h +++ b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h @@ -886,7 +886,7 @@ struct sta_rec_sec { struct sec_key key[2]; } __packed; -struct ra_phy { +struct sta_phy { u8 type; u8 flag; u8 stbc; @@ -930,7 +930,7 @@ struct sta_rec_ra { __le32 sta_cap; - struct ra_phy phy; + struct sta_phy phy; } __packed; struct sta_rec_ra_fixed { @@ -943,7 +943,7 @@ struct sta_rec_ra_fixed { u8 op_vht_rx_nss; u8 op_vht_rx_nss_type; - struct ra_phy phy; + struct sta_phy phy; u8 spe_en; u8 short_preamble; @@ -951,8 +951,14 @@ struct sta_rec_ra_fixed { u8 mmps_mode; } __packed; -#define RATE_PARAM_FIXED 3 -#define RATE_PARAM_AUTO 20 +enum { + RATE_PARAM_FIXED = 3, + RATE_PARAM_FIXED_HE_LTF = 7, + RATE_PARAM_FIXED_MCS, + RATE_PARAM_FIXED_GI = 11, + RATE_PARAM_AUTO = 20, +}; + #define RATE_CFG_MCS GENMASK(3, 0) #define RATE_CFG_NSS GENMASK(7, 4) #define RATE_CFG_GI GENMASK(11, 8) |