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| author |   Kishon Vijay Abraham I <kishon@ti.com> | 2020-07-22 16:33:14 +0530 |
|---|---|---|
| committer |   Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2020-07-28 11:31:34 +0100 |
| commit | 45b39e928966fe520de9f4bab6c39a8eca4d3180 (patch) | |
| tree | be1f4825c012d7980144036918b9bdc0c07358ad /drivers/pci/controller/cadence/pcie-cadence-host.c | |
| parent | dt-bindings: PCI: Add host mode dt-bindings for TI's J721E SoC (diff) | |
| download | wireguard-linux-45b39e928966fe520de9f4bab6c39a8eca4d3180.tar.xz wireguard-linux-45b39e928966fe520de9f4bab6c39a8eca4d3180.zip | |
dt-bindings: PCI: Add EP mode dt-bindings for TI's J721E SoC
Add PCIe EP mode dt-bindings for TI's J721E SoC.
Link: https://lore.kernel.org/r/20200722110317.4744-13-kishon@ti.com
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'drivers/pci/controller/cadence/pcie-cadence-host.c')
0 files changed, 0 insertions, 0 deletions