aboutsummaryrefslogtreecommitdiffstatshomepage
path: root/drivers/pci/controller/dwc/pci-keystone.c
diff options
context:
space:
mode:
authorKishon Vijay Abraham I <kishon@ti.com>2018-10-17 13:11:10 +0530
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2018-10-17 09:59:00 +0100
commit23fe5bd4be90099e760fe0d00665ab1e465255b3 (patch)
treedad2c94df471bd40851fc5351e5b737fc6bb38a0 /drivers/pci/controller/dwc/pci-keystone.c
parentPCI: keystone: Cleanup set_dbi_mode() and get_dbi_mode() (diff)
downloadwireguard-linux-23fe5bd4be90099e760fe0d00665ab1e465255b3.tar.xz
wireguard-linux-23fe5bd4be90099e760fe0d00665ab1e465255b3.zip
PCI: keystone: Cleanup ks_pcie_link_up()
ks_pcie_link_up() uses registers from the designware core to get the status of the link. Move the register defines to pcie-designware.h and cleanup ks_pcie_link_up(). Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Diffstat (limited to 'drivers/pci/controller/dwc/pci-keystone.c')
-rw-r--r--drivers/pci/controller/dwc/pci-keystone.c11
1 files changed, 3 insertions, 8 deletions
diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c
index 2decbaec81a3..e181e6277323 100644
--- a/drivers/pci/controller/dwc/pci-keystone.c
+++ b/drivers/pci/controller/dwc/pci-keystone.c
@@ -38,8 +38,6 @@
/* Application register defines */
#define LTSSM_EN_VAL BIT(0)
-#define LTSSM_STATE_MASK 0x1f
-#define LTSSM_STATE_L0 0x11
#define DBI_CS2 BIT(5)
#define OB_XLAT_EN_VAL BIT(1)
@@ -87,11 +85,7 @@
#define ERR_IRQ_ENABLE_SET 0x1c8
#define ERR_IRQ_ENABLE_CLR 0x1cc
-/* Config space registers */
-#define DEBUG0 0x728
-
#define MAX_MSI_HOST_IRQS 8
-
/* PCIE controller device IDs */
#define PCIE_RC_K2HK 0xb008
#define PCIE_RC_K2E 0xb009
@@ -442,8 +436,9 @@ static int ks_pcie_link_up(struct dw_pcie *pci)
{
u32 val;
- val = dw_pcie_readl_dbi(pci, DEBUG0);
- return (val & LTSSM_STATE_MASK) == LTSSM_STATE_L0;
+ val = dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0);
+ val &= PORT_LOGIC_LTSSM_STATE_MASK;
+ return (val == PORT_LOGIC_LTSSM_STATE_L0);
}
static void ks_pcie_initiate_link_train(struct keystone_pcie *ks_pcie)