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| author |   Shradha Todi <shradha.t@samsung.com> | 2021-01-06 16:15:00 +0530 |
|---|---|---|
| committer |   Bjorn Helgaas <bhelgaas@google.com> | 2021-02-24 11:09:50 -0600 |
| commit | 3856e1c5b88e5d363c251a2bc0d9fd0efdc6184a (patch) | |
| tree | 6c34e47ac0cef1f254970a7c2255d0003bb1be7c /drivers/pci/controller/dwc/pcie-designware.c | |
| parent | PCI: dwc: Drop support for config space in 'ranges' (diff) | |
| download | wireguard-linux-3856e1c5b88e5d363c251a2bc0d9fd0efdc6184a.tar.xz wireguard-linux-3856e1c5b88e5d363c251a2bc0d9fd0efdc6184a.zip | |
PCI: dwc: Change size to u64 for EP outbound iATU
Since outbound iATU permits size to be greater than 4GB for which the
support is also available, allow EP function to send u64 size instead of
truncating to u32.
Link: https://lore.kernel.org/r/1609929900-19082-1-git-send-email-shradha.t@samsung.com
Signed-off-by: Shradha Todi <shradha.t@samsung.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-designware.c')
| -rw-r--r-- | drivers/pci/controller/dwc/pcie-designware.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index c49c8b5b4800..e7b9a7d7c9a2 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -366,7 +366,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type, void dw_pcie_prog_ep_outbound_atu(struct dw_pcie *pci, u8 func_no, int index, int type, u64 cpu_addr, u64 pci_addr, - u32 size) + u64 size) { __dw_pcie_prog_outbound_atu(pci, func_no, index, type, cpu_addr, pci_addr, size); |