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authorVidya Sagar <vidyas@nvidia.com>2019-06-25 14:52:38 +0530
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2019-06-27 12:02:46 +0100
commitca98329d3b58ef636b8f455b0b1b6ac9c89738b2 (patch)
treeed9cd073b57b427ba42fb6706042a0a7d32d2932 /drivers/pci/controller/dwc/pcie-designware.c
parentPCI: dwc: Cleanup DBI,ATU read and write APIs (diff)
downloadwireguard-linux-ca98329d3b58ef636b8f455b0b1b6ac9c89738b2.tar.xz
wireguard-linux-ca98329d3b58ef636b8f455b0b1b6ac9c89738b2.zip
PCI: dwc: Export APIs to support .remove() implementation
Export all configuration space access APIs and also other APIs to support host controller drivers of dwc core based implementations while adding support for .remove() hook to build their respective drivers as modules. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-designware.c')
-rw-r--r--drivers/pci/controller/dwc/pcie-designware.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c
index c2843ea1d1e8..7d25102c304c 100644
--- a/drivers/pci/controller/dwc/pcie-designware.c
+++ b/drivers/pci/controller/dwc/pcie-designware.c
@@ -34,6 +34,7 @@ int dw_pcie_read(void __iomem *addr, int size, u32 *val)
return PCIBIOS_SUCCESSFUL;
}
+EXPORT_SYMBOL_GPL(dw_pcie_read);
int dw_pcie_write(void __iomem *addr, int size, u32 val)
{
@@ -51,6 +52,7 @@ int dw_pcie_write(void __iomem *addr, int size, u32 val)
return PCIBIOS_SUCCESSFUL;
}
+EXPORT_SYMBOL_GPL(dw_pcie_write);
u32 dw_pcie_read_dbi(struct dw_pcie *pci, u32 reg, size_t size)
{
@@ -66,6 +68,7 @@ u32 dw_pcie_read_dbi(struct dw_pcie *pci, u32 reg, size_t size)
return val;
}
+EXPORT_SYMBOL_GPL(dw_pcie_read_dbi);
void dw_pcie_write_dbi(struct dw_pcie *pci, u32 reg, size_t size, u32 val)
{
@@ -80,6 +83,7 @@ void dw_pcie_write_dbi(struct dw_pcie *pci, u32 reg, size_t size, u32 val)
if (ret)
dev_err(pci->dev, "Write DBI address failed\n");
}
+EXPORT_SYMBOL_GPL(dw_pcie_write_dbi);
u32 dw_pcie_read_dbi2(struct dw_pcie *pci, u32 reg, size_t size)
{