diff options
| author |   Will McVicker <willmcvicker@google.com> | 2022-08-25 23:54:02 +0000 |
|---|---|---|
| committer |   Lorenzo Pieralisi <lpieralisi@kernel.org> | 2022-08-29 09:56:33 +0200 |
| commit | 423511ec23e2a6fa7830ed76b0283268e795d09d (patch) | |
| tree | 3489d731444dfef1f012e87880fe4cee591515d0 /drivers/pci/controller/dwc/pcie-designware.h | |
| parent | Linux 6.0-rc1 (diff) | |
| download | wireguard-linux-423511ec23e2a6fa7830ed76b0283268e795d09d.tar.xz wireguard-linux-423511ec23e2a6fa7830ed76b0283268e795d09d.zip | |
PCI: dwc: Drop dependency on ZONE_DMA32
Re-work the msi_msg DMA allocation logic to use dmam_alloc_coherent() which
uses the coherent DMA mask to try to return an allocation within the DMA
mask limits. With that, we now can drop the msi_page parameter in struct
dw_pcie_rp. This allows kernel configurations that disable ZONE_DMA32 to
continue supporting a 32-bit DMA mask. Without this patch, the PCIe host
device will fail to probe when ZONE_DMA32 is disabled.
Link: https://lore.kernel.org/r/20220825235404.4132818-2-willmcvicker@google.com
Fixes: 35797e672ff0 ("PCI: dwc: Fix MSI msi_msg DMA mapping")
Reported-by: Isaac J. Manjarres <isaacmanjarres@google.com>
Signed-off-by: Will McVicker <willmcvicker@google.com>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Jingoo Han <jingoohan1@gmail.com>
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-designware.h')
| -rw-r--r-- | drivers/pci/controller/dwc/pcie-designware.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 09b887093a84..a871ae7eb59e 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -243,7 +243,6 @@ struct dw_pcie_rp { struct irq_domain *irq_domain; struct irq_domain *msi_domain; dma_addr_t msi_data; - struct page *msi_page; struct irq_chip *msi_irq_chip; u32 num_vectors; u32 irq_mask[MAX_MSI_CTRLS]; |