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| author |   Ziyue Zhang <ziyue.zhang@oss.qualcomm.com> | 2025-09-04 14:52:24 +0800 |
|---|---|---|
| committer |   Manivannan Sadhasivam <mani@kernel.org> | 2025-09-04 22:25:22 +0530 |
| commit | ea5fbbc15906abdef174c88cecfec4b2a0c748b9 (patch) | |
| tree | 8afffef53b1a639066c836fd5575630c7e48c132 /drivers/pci/controller/dwc/pcie-qcom-common.c | |
| parent | PCI: qcom: Add equalization settings for 8.0 GT/s and 32.0 GT/s (diff) | |
| download | wireguard-linux-ea5fbbc15906abdef174c88cecfec4b2a0c748b9.tar.xz wireguard-linux-ea5fbbc15906abdef174c88cecfec4b2a0c748b9.zip | |
PCI: qcom: Fix macro typo for CURSOR
Correct a typo in the macro names GEN3_EQ_FMDC_MAX_PRE_CURSOR_DELTA and
GEN3_EQ_FMDC_MAX_POST_CURSOR_DELTA.
Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com>
[mani: reworded description]
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://patch.msgid.link/20250904065225.1762793-3-ziyue.zhang@oss.qualcomm.com
Diffstat (limited to 'drivers/pci/controller/dwc/pcie-qcom-common.c')
| -rw-r--r-- | drivers/pci/controller/dwc/pcie-qcom-common.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/pci/controller/dwc/pcie-qcom-common.c b/drivers/pci/controller/dwc/pcie-qcom-common.c index 0c6f4514f922..01c5387e53bf 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-common.c +++ b/drivers/pci/controller/dwc/pcie-qcom-common.c @@ -38,12 +38,12 @@ void qcom_pcie_common_set_equalization(struct dw_pcie *pci) reg = dw_pcie_readl_dbi(pci, GEN3_EQ_FB_MODE_DIR_CHANGE_OFF); reg &= ~(GEN3_EQ_FMDC_T_MIN_PHASE23 | GEN3_EQ_FMDC_N_EVALS | - GEN3_EQ_FMDC_MAX_PRE_CUSROR_DELTA | - GEN3_EQ_FMDC_MAX_POST_CUSROR_DELTA); + GEN3_EQ_FMDC_MAX_PRE_CURSOR_DELTA | + GEN3_EQ_FMDC_MAX_POST_CURSOR_DELTA); reg |= FIELD_PREP(GEN3_EQ_FMDC_T_MIN_PHASE23, 0x1) | FIELD_PREP(GEN3_EQ_FMDC_N_EVALS, 0xd) | - FIELD_PREP(GEN3_EQ_FMDC_MAX_PRE_CUSROR_DELTA, 0x5) | - FIELD_PREP(GEN3_EQ_FMDC_MAX_POST_CUSROR_DELTA, 0x5); + FIELD_PREP(GEN3_EQ_FMDC_MAX_PRE_CURSOR_DELTA, 0x5) | + FIELD_PREP(GEN3_EQ_FMDC_MAX_POST_CURSOR_DELTA, 0x5); dw_pcie_writel_dbi(pci, GEN3_EQ_FB_MODE_DIR_CHANGE_OFF, reg); reg = dw_pcie_readl_dbi(pci, GEN3_EQ_CONTROL_OFF); |