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authorDilip Kota <eswara.kota@linux.intel.com>2019-12-09 11:20:06 +0800
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2020-01-09 11:57:29 +0000
commit6fd622c226e6d8387bc5340bfb2f2ca7ef28da07 (patch)
tree6bf78a82c7229c70ee6666bb78c4fe240db38ca0 /drivers/pci/controller/dwc
parentPCI: dwc: intel: PCIe RC controller driver (diff)
downloadwireguard-linux-6fd622c226e6d8387bc5340bfb2f2ca7ef28da07.tar.xz
wireguard-linux-6fd622c226e6d8387bc5340bfb2f2ca7ef28da07.zip
PCI: artpec6: Configure FTS with dwc helper function
Use DesignWare helper functions to configure Fast Training Sequence. Drop the respective code in the driver. Signed-off-by: Dilip Kota <eswara.kota@linux.intel.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
Diffstat (limited to 'drivers/pci/controller/dwc')
-rw-r--r--drivers/pci/controller/dwc/pcie-artpec6.c8
1 files changed, 1 insertions, 7 deletions
diff --git a/drivers/pci/controller/dwc/pcie-artpec6.c b/drivers/pci/controller/dwc/pcie-artpec6.c
index 9e2482bd7b6d..28d5a1095200 100644
--- a/drivers/pci/controller/dwc/pcie-artpec6.c
+++ b/drivers/pci/controller/dwc/pcie-artpec6.c
@@ -51,9 +51,6 @@ static const struct of_device_id artpec6_pcie_of_match[];
#define ACK_N_FTS_MASK GENMASK(15, 8)
#define ACK_N_FTS(x) (((x) << 8) & ACK_N_FTS_MASK)
-#define FAST_TRAINING_SEQ_MASK GENMASK(7, 0)
-#define FAST_TRAINING_SEQ(x) (((x) << 0) & FAST_TRAINING_SEQ_MASK)
-
/* ARTPEC-6 specific registers */
#define PCIECFG 0x18
#define PCIECFG_DBG_OEN BIT(24)
@@ -313,10 +310,7 @@ static void artpec6_pcie_set_nfts(struct artpec6_pcie *artpec6_pcie)
* Set the Number of Fast Training Sequences that the core
* advertises as its N_FTS during Gen2 or Gen3 link training.
*/
- val = dw_pcie_readl_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL);
- val &= ~FAST_TRAINING_SEQ_MASK;
- val |= FAST_TRAINING_SEQ(180);
- dw_pcie_writel_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL, val);
+ dw_pcie_link_set_n_fts(pci, 180);
}
static void artpec6_pcie_assert_core_reset(struct artpec6_pcie *artpec6_pcie)