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| author |   Takashi Iwai <tiwai@suse.de> | 2023-10-31 09:01:25 +0100 |
|---|---|---|
| committer | Takashi Iwai <tiwai@suse.de> | 2023-10-31 09:01:25 +0100 |
| commit | 2dc15ff73b6a7b47db0e848498cb5b0479e781c6 (patch) | |
| tree | d93457787d3349dadcbbf7691650ebdb1d0cd883 /drivers/pci/controller/dwc | |
| parent | Merge branch 'for-next' into for-linus (diff) | |
| parent | ASoC: Merge up workaround for CODECs that play noise on stopped stream (diff) | |
| download | wireguard-linux-2dc15ff73b6a7b47db0e848498cb5b0479e781c6.tar.xz wireguard-linux-2dc15ff73b6a7b47db0e848498cb5b0479e781c6.zip | |
Merge tag 'asoc-v6.7-2' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Updates for v6.7
More updates for v6,7 following the early merge request:
- Fixes for handling of component name prefixing when name prefixes
are used by the machine driver.
- Fixes for noise when stopping some Sounwire CODECs.
- Support for AMD ACP 6.3 and 7.0, Awinc AW88399, more Intel
platforms and more Qualcomm SC7180 platforms.
Diffstat (limited to 'drivers/pci/controller/dwc')
| -rw-r--r-- | drivers/pci/controller/dwc/pcie-qcom.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index e2f29404c84e..64420ecc24d1 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -43,7 +43,6 @@ #define PARF_PHY_REFCLK 0x4c #define PARF_CONFIG_BITS 0x50 #define PARF_DBI_BASE_ADDR 0x168 -#define PARF_SLV_ADDR_SPACE_SIZE_2_3_3 0x16c /* Register offset specific to IP ver 2.3.3 */ #define PARF_MHI_CLOCK_RESET_CTRL 0x174 #define PARF_AXI_MSTR_WR_ADDR_HALT 0x178 #define PARF_AXI_MSTR_WR_ADDR_HALT_V2 0x1a8 @@ -797,8 +796,7 @@ static int qcom_pcie_post_init_2_3_3(struct qcom_pcie *pcie) u16 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP); u32 val; - writel(SLV_ADDR_SPACE_SZ, - pcie->parf + PARF_SLV_ADDR_SPACE_SIZE_2_3_3); + writel(SLV_ADDR_SPACE_SZ, pcie->parf + PARF_SLV_ADDR_SPACE_SIZE); val = readl(pcie->parf + PARF_PHY_CTRL); val &= ~PHY_TEST_PWR_DOWN; |