diff options
| author |   Wolfram Sang <wsa@kernel.org> | 2023-04-24 12:50:20 +0200 |
|---|---|---|
| committer | Wolfram Sang <wsa@kernel.org> | 2023-04-24 12:50:20 +0200 |
| commit | 38c87827ffd3c7e1dd61eee9a7dea13d487dc2ed (patch) | |
| tree | e6bd1c3ae56823874a736c1512409c123c9a4219 /drivers/pci/controller/dwc | |
| parent | i2c: omap: Improve error reporting for problems during .remove() (diff) | |
| parent | i2c: xiic: xiic_xfer(): Fix runtime PM leak on error path (diff) | |
| download | wireguard-linux-38c87827ffd3c7e1dd61eee9a7dea13d487dc2ed.tar.xz wireguard-linux-38c87827ffd3c7e1dd61eee9a7dea13d487dc2ed.zip | |
Merge branch 'i2c/for-current' into i2c/for-mergewindow
This should have been in 6.3, but sadly I missed it.
Diffstat (limited to 'drivers/pci/controller/dwc')
| -rw-r--r-- | drivers/pci/controller/dwc/pcie-designware.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index 53a16b8b6ac2..8e33e6e59e68 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -1001,11 +1001,6 @@ void dw_pcie_setup(struct dw_pcie *pci) dw_pcie_writel_dbi(pci, PCIE_LINK_WIDTH_SPEED_CONTROL, val); } - val = dw_pcie_readl_dbi(pci, PCIE_PORT_LINK_CONTROL); - val &= ~PORT_LINK_FAST_LINK_MODE; - val |= PORT_LINK_DLL_LINK_EN; - dw_pcie_writel_dbi(pci, PCIE_PORT_LINK_CONTROL, val); - if (dw_pcie_cap_is(pci, CDM_CHECK)) { val = dw_pcie_readl_dbi(pci, PCIE_PL_CHK_REG_CONTROL_STATUS); val |= PCIE_PL_CHK_REG_CHK_REG_CONTINUOUS | @@ -1013,6 +1008,11 @@ void dw_pcie_setup(struct dw_pcie *pci) dw_pcie_writel_dbi(pci, PCIE_PL_CHK_REG_CONTROL_STATUS, val); } + val = dw_pcie_readl_dbi(pci, PCIE_PORT_LINK_CONTROL); + val &= ~PORT_LINK_FAST_LINK_MODE; + val |= PORT_LINK_DLL_LINK_EN; + dw_pcie_writel_dbi(pci, PCIE_PORT_LINK_CONTROL, val); + if (!pci->num_lanes) { dev_dbg(pci->dev, "Using h/w default number of lanes\n"); return; |