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authorTakashi Iwai <tiwai@suse.de>2020-10-12 16:08:57 +0200
committerTakashi Iwai <tiwai@suse.de>2020-10-12 16:08:57 +0200
commitf401b2c9931a70317b6ac0d3e6020adc3a404cc0 (patch)
treeb73efe177884c84bd86f647e2081583d719dde93 /drivers/pci/controller/dwc
parentALSA: hda: fix jack detection with Realtek codecs when in D3 (diff)
parentMerge remote-tracking branch 'asoc/for-5.10' into asoc-next (diff)
downloadwireguard-linux-f401b2c9931a70317b6ac0d3e6020adc3a404cc0.tar.xz
wireguard-linux-f401b2c9931a70317b6ac0d3e6020adc3a404cc0.zip
Merge tag 'asoc-v5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Updates for v5.10 Not a huge amount going on in the core for ASoC this time but quite a lot of driver activity, especially for the Intel platforms: - Replacement of the DSP driver for some older x86 systems with a new one which was written with closer reference to the DSP firmware so should hopefully be more robust and maintainable. - A big batch of static checker and other fixes for the rest of the x86 DSP drivers. - Cleanup of the error unwinding code from Morimoto-san, hopefully making it more robust. - Helpers for parsing auxiluary devices from the device tree from Stephan Gerhold. - New support for AllWinner A64, Cirrus Logic CS4234, Mediatek MT6359 Microchip S/PDIF TX and RX controllers, Realtek RT1015P, and Texas Instruments J721E, TAS2110, TAS2564 and TAS2764
Diffstat (limited to 'drivers/pci/controller/dwc')
-rw-r--r--drivers/pci/controller/dwc/pci-imx6.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c
index 90df28c7cb0c..5fef2613b223 100644
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -439,7 +439,7 @@ static int imx6_pcie_enable_ref_clk(struct imx6_pcie *imx6_pcie)
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
IMX6SX_GPR12_PCIE_TEST_POWERDOWN, 0);
break;
- case IMX6QP: /* FALLTHROUGH */
+ case IMX6QP:
case IMX6Q:
/* power up core phy and enable ref clock */
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR1,
@@ -642,7 +642,7 @@ static void imx6_pcie_init_phy(struct imx6_pcie *imx6_pcie)
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
IMX6SX_GPR12_PCIE_RX_EQ_MASK,
IMX6SX_GPR12_PCIE_RX_EQ_2);
- /* FALLTHROUGH */
+ fallthrough;
default:
regmap_update_bits(imx6_pcie->iomuxc_gpr, IOMUXC_GPR12,
IMX6Q_GPR12_PCIE_CTL_2, 0 << 10);
@@ -1105,7 +1105,7 @@ static int imx6_pcie_probe(struct platform_device *pdev)
dev_err(dev, "pcie_aux clock source missing or invalid\n");
return PTR_ERR(imx6_pcie->pcie_aux);
}
- /* fall through */
+ fallthrough;
case IMX7D:
if (dbi_base->start == IMX8MQ_PCIE2_BASE_ADDR)
imx6_pcie->controller_id = 1;