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| author |   Christophe Leroy <christophe.leroy@csgroup.eu> | 2022-01-21 08:42:21 +0000 |
|---|---|---|
| committer |   Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2022-02-24 15:04:51 +0000 |
| commit | 0cc62aed370d91ec3d5cf258e53028c736e88a09 (patch) | |
| tree | 84c0353cbdfb5818d7c9e481c80fece77a29c4f3 /drivers/pci/controller/pci-xgene.c | |
| parent | Linux 5.17-rc1 (diff) | |
| download | wireguard-linux-0cc62aed370d91ec3d5cf258e53028c736e88a09.tar.xz wireguard-linux-0cc62aed370d91ec3d5cf258e53028c736e88a09.zip | |
sizes.h: Add SZ_1T macro
Today drivers/pci/controller/pci-xgene.c defines SZ_1T
Move it into linux/sizes.h so that it can be re-used elsewhere.
Link: https://lore.kernel.org/r/575cb7164cf124c75df7cb9242ea7374733942bf.1642752946.git.christophe.leroy@csgroup.eu
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Cc: Toan Le <toan@os.amperecomputing.com>
Cc: linux-pci@vger.kernel.org
Diffstat (limited to 'drivers/pci/controller/pci-xgene.c')
| -rw-r--r-- | drivers/pci/controller/pci-xgene.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/pci/controller/pci-xgene.c b/drivers/pci/controller/pci-xgene.c index 0d5acbfc7143..77c1fe7e11f9 100644 --- a/drivers/pci/controller/pci-xgene.c +++ b/drivers/pci/controller/pci-xgene.c @@ -49,7 +49,6 @@ #define EN_REG 0x00000001 #define OB_LO_IO 0x00000002 #define XGENE_PCIE_DEVICEID 0xE004 -#define SZ_1T (SZ_1G*1024ULL) #define PIPE_PHY_RATE_RD(src) ((0xc000 & (u32)(src)) >> 0xe) #define XGENE_V1_PCI_EXP_CAP 0x40 |