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authorAlan Douglas <adouglas@cadence.com>2018-06-25 09:30:50 +0100
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>2018-07-11 10:39:39 +0100
commitdfb80534692ddc5b97e1da4384f13dc0287fccb2 (patch)
tree7d565642e9c5fce2567d5f43db48288647f864e7 /drivers/pci/controller/pcie-cadence.h
parentPCI: cadence: Update cdns_pcie_writel() function signature (diff)
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PCI: cadence: Add generic PHY support to host and EP drivers
If PHYs are present, initialize and enable them at driver probe. Signed-off-by: Alan Douglas <adouglas@cadence.com> [lorenzo.pieralisi@arm.com: updated commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Diffstat (limited to 'drivers/pci/controller/pcie-cadence.h')
-rw-r--r--drivers/pci/controller/pcie-cadence.h7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/pci/controller/pcie-cadence.h b/drivers/pci/controller/pcie-cadence.h
index ed336cc7f4ba..b342c808f7d6 100644
--- a/drivers/pci/controller/pcie-cadence.h
+++ b/drivers/pci/controller/pcie-cadence.h
@@ -8,6 +8,7 @@
#include <linux/kernel.h>
#include <linux/pci.h>
+#include <linux/phy/phy.h>
/*
* Local Management Registers
@@ -229,6 +230,9 @@ struct cdns_pcie {
struct resource *mem_res;
bool is_rc;
u8 bus;
+ int phy_count;
+ struct phy **phy;
+ struct device_link **link;
};
/* Register access */
@@ -307,5 +311,8 @@ void cdns_pcie_set_outbound_region_for_normal_msg(struct cdns_pcie *pcie, u8 fn,
u32 r, u64 cpu_addr);
void cdns_pcie_reset_outbound_region(struct cdns_pcie *pcie, u32 r);
+void cdns_pcie_disable_phy(struct cdns_pcie *pcie);
+int cdns_pcie_enable_phy(struct cdns_pcie *pcie);
+int cdns_pcie_init_phy(struct device *dev, struct cdns_pcie *pcie);
#endif /* _PCIE_CADENCE_H */