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| author |   Bjorn Helgaas <bhelgaas@google.com> | 2022-10-05 17:32:52 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2022-10-05 17:32:52 -0500 |
| commit | c1c2d8921f10f8b81c57ed3838f150bb711c83c0 (patch) | |
| tree | a07e7501865c1f402b567fe36419e05899e2d2cf /drivers/pci/pci.h | |
| parent | Linux 6.0-rc1 (diff) | |
| parent | PCI/ASPM: Correct LTR_L1.2_THRESHOLD computation (diff) | |
| download | wireguard-linux-c1c2d8921f10f8b81c57ed3838f150bb711c83c0.tar.xz wireguard-linux-c1c2d8921f10f8b81c57ed3838f150bb711c83c0.zip | |
Merge branch 'pci/aspm'
- Save L1 PM Substates Capability across suspend/resume so L1SS keeps
working after resume (Vidya Sagar)
- If device lacks L1 PM Substates Capability, don't read junk and treat it
as such a Capability (Bjorn Helgaas)
- Fix the LTR_L1.2_THRESHOLD computation, which previously configured the
threshold for entering L1.2 to be lower than intended, so L1.2 could be
used when it shouldn't be (Bjorn Helgaas)
* pci/aspm:
PCI/ASPM: Correct LTR_L1.2_THRESHOLD computation
PCI/ASPM: Ignore L1 PM Substates if device lacks capability
PCI/ASPM: Factor out L1 PM Substates configuration
PCI/ASPM: Save L1 PM Substates Capability for suspend/resume
PCI/ASPM: Refactor L1 PM Substates Control Register programming
Diffstat (limited to 'drivers/pci/pci.h')
| -rw-r--r-- | drivers/pci/pci.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 785f31086313..365a844ec430 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -561,10 +561,14 @@ bool pcie_wait_for_link(struct pci_dev *pdev, bool active); void pcie_aspm_init_link_state(struct pci_dev *pdev); void pcie_aspm_exit_link_state(struct pci_dev *pdev); void pcie_aspm_powersave_config_link(struct pci_dev *pdev); +void pci_save_aspm_l1ss_state(struct pci_dev *dev); +void pci_restore_aspm_l1ss_state(struct pci_dev *dev); #else static inline void pcie_aspm_init_link_state(struct pci_dev *pdev) { } static inline void pcie_aspm_exit_link_state(struct pci_dev *pdev) { } static inline void pcie_aspm_powersave_config_link(struct pci_dev *pdev) { } +static inline void pci_save_aspm_l1ss_state(struct pci_dev *dev) { } +static inline void pci_restore_aspm_l1ss_state(struct pci_dev *dev) { } #endif #ifdef CONFIG_PCIE_ECRC |