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| author |   Keith Busch <keith.busch@intel.com> | 2019-05-01 08:29:42 -0600 |
|---|---|---|
| committer |   Bjorn Helgaas <bhelgaas@google.com> | 2019-05-02 08:34:32 -0500 |
| commit | 2078e1e7f7e0e21bd0291908f3037c39e666d27b (patch) | |
| tree | a9b726e7f543d09fbfb3afe36f4349b011d2e434 /drivers/pci/pcie/portdrv.h | |
| parent | PCI/portdrv: Use shared MSI/MSI-X vector for Bandwidth Management (diff) | |
| download | wireguard-linux-2078e1e7f7e0e21bd0291908f3037c39e666d27b.tar.xz wireguard-linux-2078e1e7f7e0e21bd0291908f3037c39e666d27b.zip | |
PCI/LINK: Add Kconfig option (default off)
e8303bb7a75c ("PCI/LINK: Report degraded links via link bandwidth
notification") added dmesg logging whenever a link changes speed or width
to a state that is considered degraded. Unfortunately, it cannot
differentiate signal integrity-related link changes from those
intentionally initiated by an endpoint driver, including drivers that may
live in userspace or VMs when making use of vfio-pci. Some GPU drivers
actively manage the link state to save power, which generates a stream of
messages like this:
vfio-pci 0000:07:00.0: 32.000 Gb/s available PCIe bandwidth, limited by 2.5 GT/s x16 link at 0000:00:02.0 (capable of 64.000 Gb/s with 5 GT/s x16 link)
Since we can't distinguish the intentional changes from the signal
integrity issues, leave the reporting turned off by default. Add a Kconfig
option to turn it on if desired.
Fixes: e8303bb7a75c ("PCI/LINK: Report degraded links via link bandwidth notification")
Link: https://lore.kernel.org/linux-pci/20190501142942.26972-1-keith.busch@intel.com
Signed-off-by: Keith Busch <keith.busch@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/pcie/portdrv.h')
| -rw-r--r-- | drivers/pci/pcie/portdrv.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/pci/pcie/portdrv.h b/drivers/pci/pcie/portdrv.h index 1d50dc58ac40..944827a8c7d3 100644 --- a/drivers/pci/pcie/portdrv.h +++ b/drivers/pci/pcie/portdrv.h @@ -49,7 +49,11 @@ int pcie_dpc_init(void); static inline int pcie_dpc_init(void) { return 0; } #endif +#ifdef CONFIG_PCIE_BW int pcie_bandwidth_notification_init(void); +#else +static inline int pcie_bandwidth_notification_init(void) { return 0; } +#endif /* Port Type */ #define PCIE_ANY_PORT (~0) |