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author | 2019-02-11 09:26:45 +0100 | |
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committer | 2019-02-11 09:26:45 +0100 | |
commit | c744ca39f28f9a1e94a62ba02483619925d25ddc (patch) | |
tree | bfcd445d31c88130cb0833675e2c7ea1c40f47e0 /drivers/pci/quirks.c | |
parent | serial: max310x: Correction of the initial setting of the MODE1 bits for various supported ICs. (diff) | |
parent | Linux 5.0-rc6 (diff) | |
download | wireguard-linux-c744ca39f28f9a1e94a62ba02483619925d25ddc.tar.xz wireguard-linux-c744ca39f28f9a1e94a62ba02483619925d25ddc.zip |
Merge 5.0-rc6 into tty-next
We need the tty fixes in here for other patches to be based on.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/pci/quirks.c')
-rw-r--r-- | drivers/pci/quirks.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index b0a413f3f7ca..e2a879e93d86 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -639,8 +639,9 @@ static void quirk_synopsys_haps(struct pci_dev *pdev) break; } } -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SYNOPSYS, PCI_ANY_ID, - quirk_synopsys_haps); +DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_SYNOPSYS, PCI_ANY_ID, + PCI_CLASS_SERIAL_USB_XHCI, 0, + quirk_synopsys_haps); /* * Let's make the southbridge information explicit instead of having to |