diff options
| author |   Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2022-09-16 23:54:49 +0300 |
|---|---|---|
| committer |   Linus Walleij <linus.walleij@linaro.org> | 2022-09-20 11:22:12 +0200 |
| commit | d6afdf8826ef4c719ab78d33e932dc6ad9dedb35 (patch) | |
| tree | ce669ceb9f22dbf4dce29637b168cee4147038bf /drivers/pinctrl | |
| parent | pinctrl: cy8c95x0: Lock register accesses in cy8c95x0_set_mux() (diff) | |
| download | wireguard-linux-d6afdf8826ef4c719ab78d33e932dc6ad9dedb35.tar.xz wireguard-linux-d6afdf8826ef4c719ab78d33e932dc6ad9dedb35.zip | |
pinctrl: cy8c95x0: Drop atomicity on operations on push_pull
The push_pull member is always accessed under the mutex, hence
no need to use atomic operations on it.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20220916205450.86278-2-andriy.shevchenko@linux.intel.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl')
| -rw-r--r-- | drivers/pinctrl/pinctrl-cy8c95x0.c | 15 |
1 files changed, 8 insertions, 7 deletions
diff --git a/drivers/pinctrl/pinctrl-cy8c95x0.c b/drivers/pinctrl/pinctrl-cy8c95x0.c index 75be06d29dc1..367a9386dfb7 100644 --- a/drivers/pinctrl/pinctrl-cy8c95x0.c +++ b/drivers/pinctrl/pinctrl-cy8c95x0.c @@ -573,7 +573,8 @@ static int cy8c95x0_gpio_direction_input(struct gpio_chip *gc, unsigned int off) ret = regmap_write_bits(chip->regmap, CY8C95X0_DRV_HIZ, bit, bit); if (ret) goto out; - clear_bit(off, chip->push_pull); + + __clear_bit(off, chip->push_pull); } out: @@ -775,27 +776,27 @@ static int cy8c95x0_gpio_set_pincfg(struct cy8c95x0_pinctrl *chip, switch (param) { case PIN_CONFIG_BIAS_PULL_UP: - clear_bit(off, chip->push_pull); + __clear_bit(off, chip->push_pull); reg = CY8C95X0_DRV_PU; break; case PIN_CONFIG_BIAS_PULL_DOWN: - clear_bit(off, chip->push_pull); + __clear_bit(off, chip->push_pull); reg = CY8C95X0_DRV_PD; break; case PIN_CONFIG_BIAS_DISABLE: - clear_bit(off, chip->push_pull); + __clear_bit(off, chip->push_pull); reg = CY8C95X0_DRV_HIZ; break; case PIN_CONFIG_DRIVE_OPEN_DRAIN: - clear_bit(off, chip->push_pull); + __clear_bit(off, chip->push_pull); reg = CY8C95X0_DRV_ODL; break; case PIN_CONFIG_DRIVE_OPEN_SOURCE: - clear_bit(off, chip->push_pull); + __clear_bit(off, chip->push_pull); reg = CY8C95X0_DRV_ODH; break; case PIN_CONFIG_DRIVE_PUSH_PULL: - set_bit(off, chip->push_pull); + __set_bit(off, chip->push_pull); reg = CY8C95X0_DRV_PP_FAST; break; case PIN_CONFIG_MODE_PWM: |