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| author |   David E. Box <david.e.box@linux.intel.com> | 2023-11-29 14:21:20 -0800 |
|---|---|---|
| committer |   Hans de Goede <hdegoede@redhat.com> | 2023-12-04 14:53:43 +0100 |
| commit | e97ec7f621fbfdce07bf1b98a26883ee19281747 (patch) | |
| tree | 3f88a0283e17f7829dc71a89cd35e3e2bb159e1f /drivers/platform/x86/intel/pmt/crashlog.c | |
| parent | platform/x86/intel/vsec: Add intel_vsec_register (diff) | |
| download | wireguard-linux-e97ec7f621fbfdce07bf1b98a26883ee19281747.tar.xz wireguard-linux-e97ec7f621fbfdce07bf1b98a26883ee19281747.zip | |
platform/x86/intel/vsec: Add base address field
Some devices may emulate PCI VSEC capabilities in MMIO. In such cases the
BAR is not readable from a config space. Provide a field for drivers to
indicate the base address to be used.
Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/r/20231129222132.2331261-9-david.e.box@linux.intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'drivers/platform/x86/intel/pmt/crashlog.c')
0 files changed, 0 insertions, 0 deletions