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| author |   Prashant Malani <pmalani@chromium.org> | 2022-08-19 19:08:03 +0000 |
|---|---|---|
| committer | Prashant Malani <pmalani@chromium.org> | 2022-08-26 22:34:02 +0000 |
| commit | 4e477663e396f48c5cfc5f2d75d4b514f409516a (patch) | |
| tree | 5a3a838b87bf4c79785d7e8f1e5d5acbf835b161 /drivers/platform | |
| parent | platform/chrome: cros_ec_typec: Add bit offset for DP VDO (diff) | |
| download | wireguard-linux-4e477663e396f48c5cfc5f2d75d4b514f409516a.tar.xz wireguard-linux-4e477663e396f48c5cfc5f2d75d4b514f409516a.zip | |
platform/chrome: cros_ec_typec: Correct alt mode index
Alt mode indices used by USB PD (Power Delivery) start with 1, not 0.
Update the alt mdoe registration code to factor this in to the alt mode
descriptor.
Fixes: de0f49487db3 ("platform/chrome: cros_ec_typec: Register partner altmodes")
Signed-off-by: Prashant Malani <pmalani@chromium.org>
Acked-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Reviewed-by: Tzung-Bi Shih <tzungbi@kernel.org>
Link: https://lore.kernel.org/r/20220819190807.1275937-3-pmalani@chromium.org
Diffstat (limited to 'drivers/platform')
| -rw-r--r-- | drivers/platform/chrome/cros_ec_typec.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c index d4dbca5d91af..00208ffbe2e7 100644 --- a/drivers/platform/chrome/cros_ec_typec.c +++ b/drivers/platform/chrome/cros_ec_typec.c @@ -734,7 +734,7 @@ static int cros_typec_register_altmodes(struct cros_typec_data *typec, int port_ for (j = 0; j < sop_disc->svids[i].mode_count; j++) { memset(&desc, 0, sizeof(desc)); desc.svid = sop_disc->svids[i].svid; - desc.mode = j; + desc.mode = j + 1; desc.vdo = sop_disc->svids[i].mode_vdo[j]; if (is_partner) |