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| author |   leilk.liu <leilk.liu@mediatek.com> | 2021-02-07 11:09:52 +0800 |
|---|---|---|
| committer |   Mark Brown <broonie@kernel.org> | 2021-02-08 11:41:22 +0000 |
| commit | 0486d9f91d373e7f47276f30898ee0cb12656a70 (patch) | |
| tree | 426f4e9eea532482fddac7a59b0c1c1cf70600ff /drivers/spi/spi-mem.c | |
| parent | spi: add power control when set_cs_timing (diff) | |
| download | wireguard-linux-0486d9f91d373e7f47276f30898ee0cb12656a70.tar.xz wireguard-linux-0486d9f91d373e7f47276f30898ee0cb12656a70.zip | |
spi: support CS timing for HW & SW mode
this patch supports the controller's HW CS and SW CS via use cs_gpio.
Signed-off-by: leilk.liu <leilk.liu@mediatek.com>
Link: https://lore.kernel.org/r/20210207030953.9297-3-leilk.liu@mediatek.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'drivers/spi/spi-mem.c')
0 files changed, 0 insertions, 0 deletions