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| author |   Mark Brown <broonie@linaro.org> | 2014-05-05 12:27:30 -0700 |
|---|---|---|
| committer | Mark Brown <broonie@linaro.org> | 2014-05-05 12:27:30 -0700 |
| commit | af46929e6ee7197dfe315af3c5bb5cc75a0aec9c (patch) | |
| tree | 18359b934daf8c7e271930c938bd867a379cace7 /drivers/spi/spi-sirf.c | |
| parent | ASoC: fsl_spdif: Use clk_set_rate() for spdif root clock only (diff) | |
| parent | Linux 3.15-rc4 (diff) | |
| download | wireguard-linux-af46929e6ee7197dfe315af3c5bb5cc75a0aec9c.tar.xz wireguard-linux-af46929e6ee7197dfe315af3c5bb5cc75a0aec9c.zip | |
Merge tag 'v3.15-rc4' into asoc-fsl-spdif
Linux 3.15-rc4
Diffstat (limited to '')
| -rw-r--r-- | drivers/spi/spi-sirf.c | 20 |
1 files changed, 17 insertions, 3 deletions
diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c index 1a77ad52812f..67d8909dcf39 100644 --- a/drivers/spi/spi-sirf.c +++ b/drivers/spi/spi-sirf.c @@ -287,8 +287,8 @@ static irqreturn_t spi_sirfsoc_irq(int irq, void *dev_id) sspi->left_rx_word) sspi->rx_word(sspi); - if (spi_stat & (SIRFSOC_SPI_FIFO_EMPTY - | SIRFSOC_SPI_TXFIFO_THD_REACH)) + if (spi_stat & (SIRFSOC_SPI_TXFIFO_EMPTY | + SIRFSOC_SPI_TXFIFO_THD_REACH)) while (!((readl(sspi->base + SIRFSOC_SPI_TXFIFO_STATUS) & SIRFSOC_SPI_FIFO_FULL)) && sspi->left_tx_word) @@ -470,7 +470,16 @@ static void spi_sirfsoc_chipselect(struct spi_device *spi, int value) writel(regval, sspi->base + SIRFSOC_SPI_CTRL); } else { int gpio = sspi->chipselect[spi->chip_select]; - gpio_direction_output(gpio, spi->mode & SPI_CS_HIGH ? 0 : 1); + switch (value) { + case BITBANG_CS_ACTIVE: + gpio_direction_output(gpio, + spi->mode & SPI_CS_HIGH ? 1 : 0); + break; + case BITBANG_CS_INACTIVE: + gpio_direction_output(gpio, + spi->mode & SPI_CS_HIGH ? 0 : 1); + break; + } } } @@ -559,6 +568,11 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t) regval &= ~SIRFSOC_SPI_CMD_MODE; sspi->tx_by_cmd = false; } + /* + * set spi controller in RISC chipselect mode, we are controlling CS by + * software BITBANG_CS_ACTIVE and BITBANG_CS_INACTIVE. + */ + regval |= SIRFSOC_SPI_CS_IO_MODE; writel(regval, sspi->base + SIRFSOC_SPI_CTRL); if (IS_DMA_VALID(t)) { |