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| author |   Valentine Barshak <vbarshak@ru.mvista.com> | 2007-10-09 15:00:05 -0700 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@suse.de> | 2007-10-12 14:55:32 -0700 |
| commit | 4f45426cfd6170311e116442ccd8ce0e31979237 (patch) | |
| tree | d62325f3cf5261230f7d4423603665c9b5adbc01 /drivers/usb/host/ohci.h | |
| parent | USB: funsoft: Fix termios (diff) | |
| download | wireguard-linux-4f45426cfd6170311e116442ccd8ce0e31979237.tar.xz wireguard-linux-4f45426cfd6170311e116442ccd8ce0e31979237.zip | |
USB: add runtime frame_no quirk for big-endian OHCI
Add OHCI big endian frame_no quirk. The frame_no value stored in the
HCCA is a 16 bit field at a specific offset, but since not all CPUs can
do 16-bit memory accesses it's used as a 32 bit field. And that's why
big-endian OHCI must shift 16 bits ... unless the spec is not followed.
Currently there's one MPC52xx platform that doesn't need the shift. This
patch adds a new "big endian frame_no" quirk to control that at runtime.
Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
Acked-by: Dale Farnsworth <dale@farnsworth.org>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers/usb/host/ohci.h')
| -rw-r--r-- | drivers/usb/host/ohci.h | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h index dd4d5b4dcb6c..47c5c66a282c 100644 --- a/drivers/usb/host/ohci.h +++ b/drivers/usb/host/ohci.h @@ -398,6 +398,7 @@ struct ohci_hcd { #define OHCI_QUIRK_BE_MMIO 0x10 /* BE registers */ #define OHCI_QUIRK_ZFMICRO 0x20 /* Compaq ZFMicro chipset*/ #define OHCI_QUIRK_NEC 0x40 /* lost interrupts */ +#define OHCI_QUIRK_FRAME_NO 0x80 /* no big endian frame_no shift */ // there are also chip quirks/bugs in init logic struct work_struct nec_work; /* Worker for NEC quirk */ @@ -633,15 +634,12 @@ static inline u32 hc32_to_cpup (const struct ohci_hcd *ohci, const __hc32 *x) /* HCCA frame number is 16 bits, but is accessed as 32 bits since not all * hardware handles 16 bit reads. That creates a different confusion on * some big-endian SOC implementations. Same thing happens with PSW access. - * - * FIXME: Deal with that as a runtime quirk when STB03xxx is ported over - * to arch/powerpc */ -#ifdef CONFIG_STB03xxx -#define OHCI_BE_FRAME_NO_SHIFT 16 +#ifdef CONFIG_PPC_MPC52xx +#define big_endian_frame_no_quirk(ohci) (ohci->flags & OHCI_QUIRK_FRAME_NO) #else -#define OHCI_BE_FRAME_NO_SHIFT 0 +#define big_endian_frame_no_quirk(ohci) 0 #endif static inline u16 ohci_frame_no(const struct ohci_hcd *ohci) @@ -649,7 +647,8 @@ static inline u16 ohci_frame_no(const struct ohci_hcd *ohci) u32 tmp; if (big_endian_desc(ohci)) { tmp = be32_to_cpup((__force __be32 *)&ohci->hcca->frame_no); - tmp >>= OHCI_BE_FRAME_NO_SHIFT; + if (!big_endian_frame_no_quirk(ohci)) + tmp >>= 16; } else tmp = le32_to_cpup((__force __le32 *)&ohci->hcca->frame_no); |