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| author |   Marc Zyngier <marc.zyngier@arm.com> | 2018-05-23 18:41:38 +0100 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2018-06-01 13:24:51 +0200 |
| commit | c2ef60fea2dc7f903450926aee1f9c282ea529ca (patch) | |
| tree | ec256586ea5a1cc675a8efce6bb91ae6276b4f30 /drivers/usb/host/xhci-pci.c | |
| parent | xhci: Add quirk to zero 64bit registers on Renesas PCIe controllers (diff) | |
| download | wireguard-linux-c2ef60fea2dc7f903450926aee1f9c282ea529ca.tar.xz wireguard-linux-c2ef60fea2dc7f903450926aee1f9c282ea529ca.zip | |
Revert "xhci: Reset Renesas uPD72020x USB controller for 32-bit DMA issue"
This reverts commit 8466489ef5ba48272ba4fa4ea9f8f403306de4c7.
Now that we can properly reset the uPD72020x without a hard PCI reset,
let's get rid of the existing quirks.
Tested-by: Domenico Andreoli <domenico.andreoli@linux.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Tested-by: Faiz Abbas <faiz_abbas@ti.com>
Tested-by: Domenico Andreoli <domenico.andreoli@linux.com>
Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/usb/host/xhci-pci.c')
| -rw-r--r-- | drivers/usb/host/xhci-pci.c | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c index e0a0a12871e2..6372edf339d9 100644 --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c @@ -288,13 +288,6 @@ static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) driver = (struct hc_driver *)id->driver_data; - /* For some HW implementation, a XHCI reset is just not enough... */ - if (usb_xhci_needs_pci_reset(dev)) { - dev_info(&dev->dev, "Resetting\n"); - if (pci_reset_function_locked(dev)) - dev_warn(&dev->dev, "Reset failed"); - } - /* Prevent runtime suspending between USB-2 and USB-3 initialization */ pm_runtime_get_noresume(&dev->dev); |