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authorThierry Reding <treding@nvidia.com>2016-02-08 19:34:16 +0100
committerThierry Reding <treding@nvidia.com>2016-04-29 16:48:59 +0200
commitab065e969640d9afd3967266eb3193fb3ac298bd (patch)
treea7e4a921776ef69f95dc79a614a26e8effe17f0c /drivers/usb/host/xhci-tegra.c
parentusb: xhci: Add NVIDIA Tegra XUSB controller driver (diff)
downloadwireguard-linux-ab065e969640d9afd3967266eb3193fb3ac298bd.tar.xz
wireguard-linux-ab065e969640d9afd3967266eb3193fb3ac298bd.zip
usb: xhci: tegra: Add Tegra210 support
Parameterize more parts of the driver and add support for Tegra210. Acked-by: Mathias Nyman <mathias.nyman@linux.intel.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/usb/host/xhci-tegra.c')
-rw-r--r--drivers/usb/host/xhci-tegra.c59
1 files changed, 51 insertions, 8 deletions
diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c
index 2860a454e30a..0f53ae0f464e 100644
--- a/drivers/usb/host/xhci-tegra.c
+++ b/drivers/usb/host/xhci-tegra.c
@@ -159,6 +159,8 @@ struct tegra_xusb_soc {
unsigned int count;
} usb2, ulpi, hsic, usb3;
} ports;
+
+ bool scale_ss_clock;
};
struct tegra_xusb {
@@ -497,13 +499,19 @@ static void tegra_xusb_mbox_handle(struct tegra_xusb *tegra,
case MBOX_CMD_INC_SSPI_CLOCK:
case MBOX_CMD_DEC_SSPI_CLOCK:
- err = tegra_xusb_set_ss_clk(tegra, msg->data * 1000);
- if (err < 0)
- rsp.cmd = MBOX_CMD_NAK;
- else
+ if (tegra->soc->scale_ss_clock) {
+ err = tegra_xusb_set_ss_clk(tegra, msg->data * 1000);
+ if (err < 0)
+ rsp.cmd = MBOX_CMD_NAK;
+ else
+ rsp.cmd = MBOX_CMD_ACK;
+
+ rsp.data = clk_get_rate(tegra->ss_src_clk) / 1000;
+ } else {
rsp.cmd = MBOX_CMD_ACK;
+ rsp.data = msg->data;
+ }
- rsp.data = clk_get_rate(tegra->ss_src_clk) / 1000;
break;
case MBOX_CMD_SET_BW:
@@ -685,9 +693,11 @@ static int tegra_xusb_clk_enable(struct tegra_xusb *tegra)
if (err < 0)
goto disable_fs_src;
- err = tegra_xusb_set_ss_clk(tegra, TEGRA_XHCI_SS_HIGH_SPEED);
- if (err < 0)
- goto disable_hs_src;
+ if (tegra->soc->scale_ss_clock) {
+ err = tegra_xusb_set_ss_clk(tegra, TEGRA_XHCI_SS_HIGH_SPEED);
+ if (err < 0)
+ goto disable_hs_src;
+ }
return 0;
@@ -1235,11 +1245,44 @@ static const struct tegra_xusb_soc tegra124_soc = {
.hsic = { .offset = 6, .count = 2, },
.usb3 = { .offset = 0, .count = 2, },
},
+ .scale_ss_clock = true,
};
MODULE_FIRMWARE("nvidia/tegra124/xusb.bin");
+static const char * const tegra210_supply_names[] = {
+ "dvddio-pex",
+ "hvddio-pex",
+ "avdd-usb",
+ "avdd-pll-utmip",
+ "avdd-pll-uerefe",
+ "dvdd-pex-pll",
+ "hvdd-pex-pll-e",
+};
+
+static const struct tegra_xusb_phy_type tegra210_phy_types[] = {
+ { .name = "usb3", .num = 4, },
+ { .name = "usb2", .num = 4, },
+ { .name = "hsic", .num = 1, },
+};
+
+static const struct tegra_xusb_soc tegra210_soc = {
+ .firmware = "nvidia/tegra210/xusb.bin",
+ .supply_names = tegra210_supply_names,
+ .num_supplies = ARRAY_SIZE(tegra210_supply_names),
+ .phy_types = tegra210_phy_types,
+ .num_types = ARRAY_SIZE(tegra210_phy_types),
+ .ports = {
+ .usb2 = { .offset = 4, .count = 4, },
+ .hsic = { .offset = 8, .count = 1, },
+ .usb3 = { .offset = 0, .count = 4, },
+ },
+ .scale_ss_clock = false,
+};
+MODULE_FIRMWARE("nvidia/tegra210/xusb.bin");
+
static const struct of_device_id tegra_xusb_of_match[] = {
{ .compatible = "nvidia,tegra124-xusb", .data = &tegra124_soc },
+ { .compatible = "nvidia,tegra210-xusb", .data = &tegra210_soc },
{ },
};
MODULE_DEVICE_TABLE(of, tegra_xusb_of_match);