diff options
| author |   Robert Hancock <robert.hancock@calian.com> | 2020-10-26 11:58:02 -0600 |
|---|---|---|
| committer |   Jakub Kicinski <kuba@kernel.org> | 2020-10-27 18:30:20 -0700 |
| commit | cd29296fdfca919590e4004a7e4905544f4c4a32 (patch) | |
| tree | 7f1d39ea83c762d0d6588a2894a4563988fe568a /drivers | |
| parent | net: core: Use skb_is_gso() in skb_checksum_help() (diff) | |
| download | wireguard-linux-cd29296fdfca919590e4004a7e4905544f4c4a32.tar.xz wireguard-linux-cd29296fdfca919590e4004a7e4905544f4c4a32.zip | |
net: phylink: disable BMCR_ISOLATE in phylink_mii_c22_pcs_config
The Xilinx PCS/PMA PHY requires that BMCR_ISOLATE be disabled for proper
operation in 1000BaseX mode. It should be safe to ensure this bit is
disabled in phylink_mii_c22_pcs_config in all cases.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk>
Link: https://lore.kernel.org/r/20201026175802.1332477-1-robert.hancock@calian.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/phy/phylink.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c index fe2296fdda19..5d8c015bc9f2 100644 --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c @@ -2515,9 +2515,10 @@ int phylink_mii_c22_pcs_config(struct mdio_device *pcs, unsigned int mode, changed = ret > 0; + /* Ensure ISOLATE bit is disabled */ bmcr = mode == MLO_AN_INBAND ? BMCR_ANENABLE : 0; ret = mdiobus_modify(pcs->bus, pcs->addr, MII_BMCR, - BMCR_ANENABLE, bmcr); + BMCR_ANENABLE | BMCR_ISOLATE, bmcr); if (ret < 0) return ret; |