aboutsummaryrefslogtreecommitdiffstatshomepage
path: root/include/dt-bindings/interconnect/imx8mq.h
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2020-06-07 10:59:32 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2020-06-07 10:59:32 -0700
commit9aa900c8094dba7a60dc805ecec1e9f720744ba1 (patch)
tree3cc09a579f8ea6d3a182076ba722f7c1648e682d /include/dt-bindings/interconnect/imx8mq.h
parentMerge tag 'driver-core-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core (diff)
parenthabanalabs: correctly cast u64 to void* (diff)
downloadwireguard-linux-9aa900c8094dba7a60dc805ecec1e9f720744ba1.tar.xz
wireguard-linux-9aa900c8094dba7a60dc805ecec1e9f720744ba1.zip
Merge tag 'char-misc-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc driver updates from Greg KH: "Here is the large set of char/misc driver patches for 5.8-rc1 Included in here are: - habanalabs driver updates, loads - mhi bus driver updates - extcon driver updates - clk driver updates (approved by the clock maintainer) - firmware driver updates - fpga driver updates - gnss driver updates - coresight driver updates - interconnect driver updates - parport driver updates (it's still alive!) - nvmem driver updates - soundwire driver updates - visorbus driver updates - w1 driver updates - various misc driver updates In short, loads of different driver subsystem updates along with the drivers as well. All have been in linux-next for a while with no reported issues" * tag 'char-misc-5.8-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (233 commits) habanalabs: correctly cast u64 to void* habanalabs: initialize variable to default value extcon: arizona: Fix runtime PM imbalance on error extcon: max14577: Add proper dt-compatible strings extcon: adc-jack: Fix an error handling path in 'adc_jack_probe()' extcon: remove redundant assignment to variable idx w1: omap-hdq: print dev_err if irq flags are not cleared w1: omap-hdq: fix interrupt handling which did show spurious timeouts w1: omap-hdq: fix return value to be -1 if there is a timeout w1: omap-hdq: cleanup to add missing newline for some dev_dbg /dev/mem: Revoke mappings when a driver claims the region misc: xilinx-sdfec: convert get_user_pages() --> pin_user_pages() misc: xilinx-sdfec: cleanup return value in xsdfec_table_write() misc: xilinx-sdfec: improve get_user_pages_fast() error handling nvmem: qfprom: remove incorrect write support habanalabs: handle MMU cache invalidation timeout habanalabs: don't allow hard reset with open processes habanalabs: GAUDI does not support soft-reset habanalabs: add print for soft reset due to event habanalabs: improve MMU cache invalidation code ...
Diffstat (limited to 'include/dt-bindings/interconnect/imx8mq.h')
-rw-r--r--include/dt-bindings/interconnect/imx8mq.h48
1 files changed, 48 insertions, 0 deletions
diff --git a/include/dt-bindings/interconnect/imx8mq.h b/include/dt-bindings/interconnect/imx8mq.h
new file mode 100644
index 000000000000..1a4cae7f8be2
--- /dev/null
+++ b/include/dt-bindings/interconnect/imx8mq.h
@@ -0,0 +1,48 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Interconnect framework driver for i.MX SoC
+ *
+ * Copyright (c) 2019-2020, NXP
+ */
+
+#ifndef __DT_BINDINGS_INTERCONNECT_IMX8MQ_H
+#define __DT_BINDINGS_INTERCONNECT_IMX8MQ_H
+
+#define IMX8MQ_ICN_NOC 1
+#define IMX8MQ_ICS_DRAM 2
+#define IMX8MQ_ICS_OCRAM 3
+#define IMX8MQ_ICM_A53 4
+
+#define IMX8MQ_ICM_VPU 5
+#define IMX8MQ_ICN_VIDEO 6
+
+#define IMX8MQ_ICM_GPU 7
+#define IMX8MQ_ICN_GPU 8
+
+#define IMX8MQ_ICM_DCSS 9
+#define IMX8MQ_ICN_DCSS 10
+
+#define IMX8MQ_ICM_USB1 11
+#define IMX8MQ_ICM_USB2 12
+#define IMX8MQ_ICN_USB 13
+
+#define IMX8MQ_ICM_CSI1 14
+#define IMX8MQ_ICM_CSI2 15
+#define IMX8MQ_ICM_LCDIF 16
+#define IMX8MQ_ICN_DISPLAY 17
+
+#define IMX8MQ_ICM_SDMA2 18
+#define IMX8MQ_ICN_AUDIO 19
+
+#define IMX8MQ_ICN_ENET 20
+#define IMX8MQ_ICM_ENET 21
+
+#define IMX8MQ_ICM_SDMA1 22
+#define IMX8MQ_ICM_NAND 23
+#define IMX8MQ_ICM_USDHC1 24
+#define IMX8MQ_ICM_USDHC2 25
+#define IMX8MQ_ICM_PCIE1 26
+#define IMX8MQ_ICM_PCIE2 27
+#define IMX8MQ_ICN_MAIN 28
+
+#endif /* __DT_BINDINGS_INTERCONNECT_IMX8MQ_H */