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| author |   Sowjanya Komatineni <skomatineni@nvidia.com> | 2020-05-04 19:31:54 -0700 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2020-05-12 22:47:14 +0200 |
| commit | 796705bcb10c4c2af9c5b86bf7feeb5c6791d1d7 (patch) | |
| tree | 06bb2cd80c908f38633cfec262d52bf999adbfff /include/dt-bindings | |
| parent | Linux 5.7-rc1 (diff) | |
| download | wireguard-linux-796705bcb10c4c2af9c5b86bf7feeb5c6791d1d7.tar.xz wireguard-linux-796705bcb10c4c2af9c5b86bf7feeb5c6791d1d7.zip | |
dt-bindings: clock: tegra: Add clock ID for CSI TPG clock
Tegra210 uses PLLD out internally for CSI TPG. This patch adds a clock
ID for this CSI TPG clock from PLLD.
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include/dt-bindings')
| -rw-r--r-- | include/dt-bindings/clock/tegra210-car.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/tegra210-car.h b/include/dt-bindings/clock/tegra210-car.h index 7a8f10b9a66d..99c598694923 100644 --- a/include/dt-bindings/clock/tegra210-car.h +++ b/include/dt-bindings/clock/tegra210-car.h @@ -358,7 +358,7 @@ #define TEGRA210_CLK_PLL_A_OUT0_OUT_ADSP 324 /* 325 */ #define TEGRA210_CLK_OSC 326 -/* 327 */ +#define TEGRA210_CLK_CSI_TPG 327 /* 328 */ /* 329 */ /* 330 */ |