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authorPeter De Schrijver <pdeschrijver@nvidia.com>2017-02-28 17:19:24 +0200
committerThierry Reding <treding@nvidia.com>2017-03-20 14:09:05 +0100
commit3843832fc8cadc2d48ba4ea4cd350a696906ac42 (patch)
tree68fb38c13a3a53ec1f46a44487105caf0dde80f9 /include/linux/clk
parentclk: tegra: Add aclk (diff)
downloadwireguard-linux-3843832fc8cadc2d48ba4ea4cd350a696906ac42.tar.xz
wireguard-linux-3843832fc8cadc2d48ba4ea4cd350a696906ac42.zip
clk: tegra: Handle UTMIPLL IDDQ
Export UTMIPLL IDDQ functions. These will be needed when powergating the XUSB partition. Signed-off-by: BH Hsieh <bhsieh@nvidia.com> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include/linux/clk')
-rw-r--r--include/linux/clk/tegra.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/linux/clk/tegra.h b/include/linux/clk/tegra.h
index 7007a5f48080..e17d32831e28 100644
--- a/include/linux/clk/tegra.h
+++ b/include/linux/clk/tegra.h
@@ -125,5 +125,7 @@ extern void tegra210_xusb_pll_hw_control_enable(void);
extern void tegra210_xusb_pll_hw_sequence_start(void);
extern void tegra210_sata_pll_hw_control_enable(void);
extern void tegra210_sata_pll_hw_sequence_start(void);
+extern void tegra210_put_utmipll_in_iddq(void);
+extern void tegra210_put_utmipll_out_iddq(void);
#endif /* __LINUX_CLK_TEGRA_H_ */