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author | 2024-11-13 18:21:20 -0800 | |
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committer | 2025-01-18 12:33:39 -0800 | |
commit | 4bf97069239bcfca9840936313c7ac35a6e04488 (patch) | |
tree | 32084ed1af940bb069b25c8bb58c855212cff94c /include/linux/cpu.h | |
parent | selftests: riscv: Support xtheadvector in vector tests (diff) | |
download | wireguard-linux-4bf97069239bcfca9840936313c7ac35a6e04488.tar.xz wireguard-linux-4bf97069239bcfca9840936313c7ac35a6e04488.zip |
riscv: Add ghostwrite vulnerability
Follow the patterns of the other architectures that use
GENERIC_CPU_VULNERABILITIES for riscv to introduce the ghostwrite
vulnerability and mitigation. The mitigation is to disable all vector
which is accomplished by clearing the bit from the cpufeature field.
Ghostwrite only affects thead c9xx CPUs that impelment xtheadvector, so
the vulerability will only be mitigated on these CPUs.
Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
Tested-by: Yangyu Chen <cyy@cyyself.name>
Link: https://lore.kernel.org/r/20241113-xtheadvector-v11-14-236c22791ef9@rivosinc.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'include/linux/cpu.h')
-rw-r--r-- | include/linux/cpu.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/cpu.h b/include/linux/cpu.h index bdcec1732445..6a0a8f1c7c90 100644 --- a/include/linux/cpu.h +++ b/include/linux/cpu.h @@ -77,6 +77,7 @@ extern ssize_t cpu_show_gds(struct device *dev, struct device_attribute *attr, char *buf); extern ssize_t cpu_show_reg_file_data_sampling(struct device *dev, struct device_attribute *attr, char *buf); +extern ssize_t cpu_show_ghostwrite(struct device *dev, struct device_attribute *attr, char *buf); extern __printf(4, 5) struct device *cpu_device_create(struct device *parent, void *drvdata, |