diff options
| author |   Dipen Patel <dipenp@nvidia.com> | 2022-04-22 13:52:16 -0700 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2022-05-04 11:06:13 +0200 |
| commit | 42112dd77b74220e6a1f4a71bb51ca3f583d3842 (patch) | |
| tree | f186d4d8142a785199f546cd16974de097e2f0f2 /include/linux/gpio/driver.h | |
| parent | dt-bindings: Add HTE bindings (diff) | |
| download | wireguard-linux-42112dd77b74220e6a1f4a71bb51ca3f583d3842.tar.xz wireguard-linux-42112dd77b74220e6a1f4a71bb51ca3f583d3842.zip | |
gpiolib: Add HTE support
Some GPIO chip can provide hardware timestamp support on its GPIO lines
, in order to support that, additional API needs to be added which
can talk to both GPIO chip and HTE (hardware timestamping engine)
providers if there is any dependencies. This patch introduces optional
hooks to enable and disable hardware timestamping related features
in the GPIO controller chip.
Signed-off-by: Dipen Patel <dipenp@nvidia.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'include/linux/gpio/driver.h')
| -rw-r--r-- | include/linux/gpio/driver.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h index 98c93510640e..0ce96ebdaa36 100644 --- a/include/linux/gpio/driver.h +++ b/include/linux/gpio/driver.h @@ -323,6 +323,10 @@ struct gpio_irq_chip { * @add_pin_ranges: optional routine to initialize pin ranges, to be used when * requires special mapping of the pins that provides GPIO functionality. * It is called after adding GPIO chip and before adding IRQ chip. + * @en_hw_timestamp: Dependent on GPIO chip, an optional routine to + * enable hardware timestamp. + * @dis_hw_timestamp: Dependent on GPIO chip, an optional routine to + * disable hardware timestamp. * @base: identifies the first GPIO number handled by this chip; * or, if negative during registration, requests dynamic ID allocation. * DEPRECATION: providing anything non-negative and nailing the base @@ -419,6 +423,12 @@ struct gpio_chip { int (*add_pin_ranges)(struct gpio_chip *gc); + int (*en_hw_timestamp)(struct gpio_chip *gc, + u32 offset, + unsigned long flags); + int (*dis_hw_timestamp)(struct gpio_chip *gc, + u32 offset, + unsigned long flags); int base; u16 ngpio; u16 offset; |