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authorDan Williams <dan.j.williams@intel.com>2024-03-13 00:07:36 -0700
committerDan Williams <dan.j.williams@intel.com>2024-03-13 00:07:36 -0700
commitd5c0078033e2adf30e897d985fd29084ecb56b51 (patch)
tree4db9109b51457c17972fa262f1ac1bfc80aad9da /include/linux/memory.h
parentlib/firmware_table: Provide buffer length argument to cdat_table_parse() (diff)
parentcxl/region: Deal with numa nodes not enumerated by SRAT (diff)
downloadwireguard-linux-d5c0078033e2adf30e897d985fd29084ecb56b51.tar.xz
wireguard-linux-d5c0078033e2adf30e897d985fd29084ecb56b51.zip
Merge branch 'for-6.9/cxl-qos' into for-6.9/cxl
Pick up support for CXL "HMEM reporting" for v6.9, i.e. build an HMAT from CXL CDAT and PCIe switch information.
Diffstat (limited to '')
-rw-r--r--include/linux/memory.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/memory.h b/include/linux/memory.h
index f53cfdaaaa41..d8588256578a 100644
--- a/include/linux/memory.h
+++ b/include/linux/memory.h
@@ -114,6 +114,7 @@ struct mem_section;
#define DEFAULT_CALLBACK_PRI 0
#define SLAB_CALLBACK_PRI 1
#define HMAT_CALLBACK_PRI 2
+#define CXL_CALLBACK_PRI 5
#define MM_COMPUTE_BATCH_PRI 10
#define CPUSET_CALLBACK_PRI 10
#define MEMTIER_HOTPLUG_PRI 100