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authorTuan Phan <tuanphan@os.amperecomputing.com>2020-08-06 14:57:34 -0700
committerBjorn Helgaas <bhelgaas@google.com>2020-09-17 12:27:43 -0500
commit877c1a5f79c6984bbe3f2924234c08e2f4f1acd5 (patch)
tree78661f2d38a78f879a6d1e5f7d1a5122c99daa69 /include/linux/pci-ecam.h
parentPCI: Add schedule point in pci_read_config() (diff)
downloadwireguard-linux-877c1a5f79c6984bbe3f2924234c08e2f4f1acd5.tar.xz
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PCI/ACPI: Add Ampere Altra SOC MCFG quirk
Ampere Altra SOC supports only 32-bit ECAM reads. Add an MCFG quirk for the platform. Link: https://lore.kernel.org/r/1596751055-12316-1-git-send-email-tuanphan@os.amperecomputing.com Signed-off-by: Tuan Phan <tuanphan@os.amperecomputing.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'include/linux/pci-ecam.h')
-rw-r--r--include/linux/pci-ecam.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/linux/pci-ecam.h b/include/linux/pci-ecam.h
index 1af5cb02ef7f..033ce74f02e8 100644
--- a/include/linux/pci-ecam.h
+++ b/include/linux/pci-ecam.h
@@ -51,6 +51,7 @@ extern const struct pci_ecam_ops pci_generic_ecam_ops;
#if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS)
extern const struct pci_ecam_ops pci_32b_ops; /* 32-bit accesses only */
+extern const struct pci_ecam_ops pci_32b_read_ops; /* 32-bit read only */
extern const struct pci_ecam_ops hisi_pcie_ops; /* HiSilicon */
extern const struct pci_ecam_ops thunder_pem_ecam_ops; /* Cavium ThunderX 1.x & 2.x */
extern const struct pci_ecam_ops pci_thunder_ecam_ops; /* Cavium ThunderX 1.x */