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| author |   Bjorn Helgaas <bhelgaas@google.com> | 2020-06-04 12:59:09 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2020-06-04 12:59:09 -0500 |
| commit | 8ab064e93103592bb38f8e77d52e15561df619ec (patch) | |
| tree | 941fde10a82dabb1b216e03dd0021b0fc2d7cae9 /include/linux | |
| parent | Merge branch 'pci/aspm' (diff) | |
| parent | pcmcia: Use CardBus window names (PCI_CB_BRIDGE_IO_0_WINDOW etc) when freeing (diff) | |
| download | wireguard-linux-8ab064e93103592bb38f8e77d52e15561df619ec.tar.xz wireguard-linux-8ab064e93103592bb38f8e77d52e15561df619ec.zip | |
Merge branch 'pci/enumeration'
- Fix pci_register_host_bridge() device_register() error handling (Rob
Herring)
- Fix pci_host_bridge struct device release/free handling (Rob Herring)
- Program MPS for RCiEP devices (Ashok Raj)
- Inherit PTM settings from Switch Upstream Port so we can enable PTM on
Endpoints (Bjorn Helgaas)
- Add #defines for bridge windows (PCI_BRIDGE_IO_WINDOW,
PCI_BRIDGE_MEM_WINDOW, etc) (Krzysztof Wilczynski)
* pci/enumeration:
pcmcia: Use CardBus window names (PCI_CB_BRIDGE_IO_0_WINDOW etc) when freeing
PCI: Use bridge window names (PCI_BRIDGE_IO_WINDOW etc)
PCI/PTM: Inherit Switch Downstream Port PTM settings from Upstream Port
PCI: Program MPS for RCiEP devices
PCI: Fix pci_host_bridge struct device release/free handling
PCI: Fix pci_register_host_bridge() device_register() error handling
Diffstat (limited to 'include/linux')
| -rw-r--r-- | include/linux/pci.h | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/include/linux/pci.h b/include/linux/pci.h index 83ce1cdf5676..cdfb07bfdf7d 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -100,9 +100,21 @@ enum { PCI_IOV_RESOURCE_END = PCI_IOV_RESOURCES + PCI_SRIOV_NUM_BARS - 1, #endif - /* Resources assigned to buses behind the bridge */ +/* PCI-to-PCI (P2P) bridge windows */ +#define PCI_BRIDGE_IO_WINDOW (PCI_BRIDGE_RESOURCES + 0) +#define PCI_BRIDGE_MEM_WINDOW (PCI_BRIDGE_RESOURCES + 1) +#define PCI_BRIDGE_PREF_MEM_WINDOW (PCI_BRIDGE_RESOURCES + 2) + +/* CardBus bridge windows */ +#define PCI_CB_BRIDGE_IO_0_WINDOW (PCI_BRIDGE_RESOURCES + 0) +#define PCI_CB_BRIDGE_IO_1_WINDOW (PCI_BRIDGE_RESOURCES + 1) +#define PCI_CB_BRIDGE_MEM_0_WINDOW (PCI_BRIDGE_RESOURCES + 2) +#define PCI_CB_BRIDGE_MEM_1_WINDOW (PCI_BRIDGE_RESOURCES + 3) + +/* Total number of bridge resources for P2P and CardBus */ #define PCI_BRIDGE_RESOURCE_NUM 4 + /* Resources assigned to buses behind the bridge */ PCI_BRIDGE_RESOURCES, PCI_BRIDGE_RESOURCE_END = PCI_BRIDGE_RESOURCES + PCI_BRIDGE_RESOURCE_NUM - 1, |