diff options
| author |   Aya Levin <ayal@nvidia.com> | 2021-04-04 12:55:00 +0300 |
|---|---|---|
| committer |   Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-04-14 08:24:17 +0200 |
| commit | 3ca5345db92cf361494d7f3944f9a2f5fb90513c (patch) | |
| tree | 89b2566457ee81888940ddb745cf1682078cc0c2 /include | |
| parent | net/mlx5: Fix placement of log_max_flow_counter (diff) | |
| download | wireguard-linux-3ca5345db92cf361494d7f3944f9a2f5fb90513c.tar.xz wireguard-linux-3ca5345db92cf361494d7f3944f9a2f5fb90513c.zip | |
net/mlx5: Fix PBMC register mapping
[ Upstream commit 534b1204ca4694db1093b15cf3e79a99fcb6a6da ]
Add reserved mapping to cover all the register in order to avoid setting
arbitrary values to newer FW which implements the reserved fields.
Fixes: 50b4a3c23646 ("net/mlx5: PPTB and PBMC register firmware command support")
Signed-off-by: Aya Levin <ayal@nvidia.com>
Reviewed-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/mlx5/mlx5_ifc.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index 8099517e2e61..36516fe86fe7 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -9669,7 +9669,7 @@ struct mlx5_ifc_pbmc_reg_bits { struct mlx5_ifc_bufferx_reg_bits buffer[10]; - u8 reserved_at_2e0[0x40]; + u8 reserved_at_2e0[0x80]; }; struct mlx5_ifc_qtct_reg_bits { |