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| author |   David Daney <ddaney@caviumnetworks.com> | 2010-12-27 18:07:57 -0800 |
|---|---|---|
| committer |   Ralf Baechle <ralf@linux-mips.org> | 2011-01-18 19:30:23 +0100 |
| commit | 2c8c53e28f178577dfdf3a69731b998b7e3df8ae (patch) | |
| tree | 0b65ff7fa0ac67795698be7a50559d77d3bc72db /kernel/irq/manage.c | |
| parent | MIPS: Add LDX and LWX instructions to uasm. (diff) | |
| download | wireguard-linux-2c8c53e28f178577dfdf3a69731b998b7e3df8ae.tar.xz wireguard-linux-2c8c53e28f178577dfdf3a69731b998b7e3df8ae.zip | |
MIPS: Optimize TLB handlers for Octeon CPUs
Octeon can use scratch registers in the TLB handlers. Octeon II can
use LDX instructions.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1904/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'kernel/irq/manage.c')
0 files changed, 0 insertions, 0 deletions