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author | 2022-05-27 20:51:19 -0700 | |
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committer | 2022-07-21 17:19:24 -0700 | |
commit | 391785859e7e6521f622ad8c965c9792767023bc (patch) | |
tree | ebbdac616cd6b926d65dccbb3357e5b89091e4ad /kernel/resource.c | |
parent | cxl/port: Move 'cxl_ep' references to an xarray per port (diff) | |
download | wireguard-linux-391785859e7e6521f622ad8c965c9792767023bc.tar.xz wireguard-linux-391785859e7e6521f622ad8c965c9792767023bc.zip |
cxl/port: Move dport tracking to an xarray
Reduce the complexity and the overhead of walking the topology to
determine endpoint connectivity to root decoder interleave
configurations.
Note that cxl_detach_ep(), after it determines that the last @ep has
departed and decides to delete the port, now needs to walk the dport
array with the device_lock() held to remove entries. Previously
list_splice_init() could be used atomically delete all dport entries at
once and then perform entry tear down outside the lock. There is no
list_splice_init() equivalent for the xarray.
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/165784331647.1758207.6345820282285119339.stgit@dwillia2-xfh.jf.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'kernel/resource.c')
0 files changed, 0 insertions, 0 deletions