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| author |   Zhenyu Wang <zhenyuw@linux.intel.com> | 2009-06-08 14:40:19 +0800 |
|---|---|---|
| committer |   Eric Anholt <eric@anholt.net> | 2009-06-09 11:15:27 -0700 |
| commit | 036a4a7d9272582fc7370359515d807393e2f728 (patch) | |
| tree | 1f6be44c18dd9823155e60d9bc53260a41b40630 /lib/debugobjects.c | |
| parent | drm/i915: enable MCHBAR if needed (diff) | |
| download | wireguard-linux-036a4a7d9272582fc7370359515d807393e2f728.tar.xz wireguard-linux-036a4a7d9272582fc7370359515d807393e2f728.zip | |
drm/i915: handle interrupt on new chipset
Update interrupt handling methods for IGDNG with new registers
for display and graphics interrupt functions. As we won't use
irq-based vblank sync in dri2, so display interrupt on new chip
will be used for hotplug only in future.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'lib/debugobjects.c')
0 files changed, 0 insertions, 0 deletions