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| author |   Paolo Abeni <pabeni@redhat.com> | 2025-11-18 10:43:44 +0100 |
|---|---|---|
| committer | Paolo Abeni <pabeni@redhat.com> | 2025-11-18 10:43:45 +0100 |
| commit | 4e1b0afa61403a1c8e13fd475f9bedf97b5de8d9 (patch) | |
| tree | 4add583803b3b5396a1a797aa93cd3b46d677387 /lib/interval_tree_test_main.c | |
| parent | Merge branch 'dpll-zl3073x-refactor-state-management' (diff) | |
| parent | net: stmmac: Disable EEE RX clock stop when VLAN is enabled (diff) | |
| download | wireguard-linux-4e1b0afa61403a1c8e13fd475f9bedf97b5de8d9.tar.xz wireguard-linux-4e1b0afa61403a1c8e13fd475f9bedf97b5de8d9.zip | |
Merge branch 'net-stmmac-disable-eee-rx-clock-stop-when-vlan-is-enabled'
Ovidiu Panait says:
====================
net: stmmac: Disable EEE RX clock stop when VLAN is enabled
This series fixes a couple of VLAN issues observed on the Renesas RZ/V2H
EVK platform (stmmac + Microchip KSZ9131RNXI PHY):
- The first patch fixes a bug where VLAN ID 0 would not be properly removed
due to how vlan_del_hw_rx_fltr() matched entries in the VLAN filter table.
- The second patch addresses RX clock gating issues that occur during VLAN
creation and deletion when EEE is enabled with RX clock-stop active (the
default configuration). For example:
# ip link add link end1 name end1.5 type vlan id 5
15c40000.ethernet end1: Timeout accessing MAC_VLAN_Tag_Filter
RTNETLINK answers: Device or resource busy
The stmmac hardware requires the receive clock to be running when writing
certain registers, including VLAN registers. However, by default the driver
enables Energy Efficient Ethernet (EEE) and allows the PHY to stop the
receive clock when the link is idle. As a result, the RX clock might be
stopped when attempting to access these registers, leading to timeouts.
A more comprehensive overview of receive clock related issues in the
stmmac driver can be found here:
https://lore.kernel.org/all/Z9ySeo61VYTClIJJ@shell.armlinux.org.uk/
Most of the issues were resolved by commit dd557266cf5fb ("net: stmmac:
block PHY RXC clock-stop"), which wraps register accesses with
phylink_rx_clk_stop_block()/unblock() calls. However, VLAN add/delete
operations are invoked with bottom halves disabled, where sleeping is
not permitted, so those helpers cannot be used.
To avoid these VLAN timeouts, the second patch disables the EEE RX
clock-stop feature when VLAN support is enabled. This ensures the receive
clock remains active, allowing VLAN operations to complete successfully.
====================
Link: https://patch.msgid.link/20251113112721.70500-1-ovidiu.panait.rb@renesas.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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