diff options
author | 2011-05-17 15:29:11 -0700 | |
---|---|---|
committer | 2011-05-17 15:40:23 -0700 | |
commit | 161ec53c702ce9df2f439804dfb9331807066daa (patch) | |
tree | fbaaea8612b8f5482a2fa7f8e826eea8b5baf57f /lib/mpi/generic_mpih-rshift.c | |
parent | x86, cpufeature: Add CPU feature bit for enhanced REP MOVSB/STOSB (diff) | |
download | wireguard-linux-161ec53c702ce9df2f439804dfb9331807066daa.tar.xz wireguard-linux-161ec53c702ce9df2f439804dfb9331807066daa.zip |
x86, mem, intel: Initialize Enhanced REP MOVSB/STOSB
If kernel intends to use enhanced REP MOVSB/STOSB, it must ensure
IA32_MISC_ENABLE.Fast_String_Enable (bit 0) is set and CPUID.(EAX=07H, ECX=0H):
EBX[bit 9] also reports 1.
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Link: http://lkml.kernel.org/r/1305671358-14478-3-git-send-email-fenghua.yu@intel.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Diffstat (limited to 'lib/mpi/generic_mpih-rshift.c')
0 files changed, 0 insertions, 0 deletions