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author | 2011-07-23 12:41:24 +0000 | |
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committer | 2011-09-21 17:52:22 +0200 | |
commit | 77cbece76723dc9e77497c042827155388bdae6d (patch) | |
tree | 1e5088ac11f3192beb09a7d8718d88a84ace6e73 /lib/mpi/generic_mpih-rshift.c | |
parent | MIPS: Mark cascade and low level interrupts IRQF_NO_THREAD (diff) | |
download | wireguard-linux-77cbece76723dc9e77497c042827155388bdae6d.tar.xz wireguard-linux-77cbece76723dc9e77497c042827155388bdae6d.zip |
MIPS: Loongson: Mark cascade interrupts IRQF_NO_THREAD
There are two cascade interrupts in Loongson machines, one for bonito
northbridge, another for the 8259A controller in the southbridge. Both
want to be non threaded.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/2638/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'lib/mpi/generic_mpih-rshift.c')
0 files changed, 0 insertions, 0 deletions