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| author |   Tushar Behera <tushar.behera@linaro.org> | 2014-05-26 13:58:21 +0530 |
|---|---|---|
| committer |   Mark Brown <broonie@linaro.org> | 2014-05-26 16:16:54 +0100 |
| commit | b10ab7b838bdd86031aececcb386dc253ef3466f (patch) | |
| tree | 08a43428c8c631d06ae9e18def44f654397d4db1 /lib/mpi/mpi-bit.c | |
| parent | ASoC: max98090: Add NI/MI values for user pclk 19.2 MHz (diff) | |
| download | wireguard-linux-b10ab7b838bdd86031aececcb386dc253ef3466f.tar.xz wireguard-linux-b10ab7b838bdd86031aececcb386dc253ef3466f.zip | |
ASoC: max98090: Add master clock handling
If master clock is provided through device tree, then update
the master clock frequency during set_sysclk.
Documentation has been updated to reflect the change.
Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to '')
0 files changed, 0 insertions, 0 deletions