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| author |   Thomas Gleixner <tglx@linutronix.de> | 2019-05-06 12:04:12 +0200 |
|---|---|---|
| committer | Thomas Gleixner <tglx@linutronix.de> | 2019-05-06 12:04:12 +0200 |
| commit | fb4e0592654adb31bc6f3a738d6499b816a655d6 (patch) | |
| tree | e6edaf18cf3a7f49e93fb51de5a47f4b9e786f53 /lib/sbitmap.c | |
| parent | irq_work: Do not raise an IPI when queueing work on the local CPU (diff) | |
| parent | iommu/dma-iommu: Remove iommu_dma_map_msi_msg() (diff) | |
| download | wireguard-linux-fb4e0592654adb31bc6f3a738d6499b816a655d6.tar.xz wireguard-linux-fb4e0592654adb31bc6f3a738d6499b816a655d6.zip | |
Merge tag 'irqchip-5.2' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull irqchip updates from Marc Zyngier
- The huge (and terrifying) TI INTR/INTA set of drivers
- Rewrite of the stm32mp1-exti driver as a platform driver
- Update the IOMMU MSI mapping API to be RT friendly
- A number of cleanups and other low impact fixes
Diffstat (limited to '')
| -rw-r--r-- | lib/sbitmap.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/lib/sbitmap.c b/lib/sbitmap.c index 5b382c1244ed..155fe38756ec 100644 --- a/lib/sbitmap.c +++ b/lib/sbitmap.c @@ -591,6 +591,17 @@ EXPORT_SYMBOL_GPL(sbitmap_queue_wake_up); void sbitmap_queue_clear(struct sbitmap_queue *sbq, unsigned int nr, unsigned int cpu) { + /* + * Once the clear bit is set, the bit may be allocated out. + * + * Orders READ/WRITE on the asssociated instance(such as request + * of blk_mq) by this bit for avoiding race with re-allocation, + * and its pair is the memory barrier implied in __sbitmap_get_word. + * + * One invariant is that the clear bit has to be zero when the bit + * is in use. + */ + smp_mb__before_atomic(); sbitmap_deferred_clear_bit(&sbq->sb, nr); /* |